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M39P0R9070E0 Product Image
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  • M39P0R9070E0

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  • The M39P0R9070E0 combines two memory devices in one Multi-Chip Package: ① 512-M

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General Description

The M39P0R9070E0 combines two memory devices in one Multi-Chip Package: ① 512-Mbit Multiple Bank Flash memory (the M58PR512J) ② 128-Mbit Low Power Synchronous DRAM (the M65KA128AL)

This datasheet should be read in conjunction with the M58PR512J and M65KA128AL datasheets, available from www.st.com.

Recommended operating conditions do not allow more than one memory to be active at the same time.

The memory is offered in a Stacked TFBGA105 package. It is supplied with all the bits erased (set to ‘1’).

Maximum Ratings

Symbol
Parameter
Value
Unit
Min
Max
TA
Ambient Operating Temperature
–25
85
°C
TJ
SDRAM Junction Temperature
–25
90
°C
TBIAS
Temperature Under Bias
–25
85
°C
TSTG
Storage Temperature
–55
125
°C
VIO
Input or Output Voltage
–0.5
2.6
V
VDDF
Supply Voltage
–1.0
3.0
V
VDDS
LPSDRAM Supply Voltage
–0.5
2.6
V
VDDQ
Input/Output Supply Voltage
–0.5
2.6
V
VPPF
Program Voltage
–1.0
12.6
V
IO
Output Short Circuit Current
 
100
mA
tVPPH
Time for VPP at VPPH
 
100
hours

Features

■ Multi-chip package
    – 1die of 512 Mbit (32Mb x 16, Multiple Bank, Multi-Level, Burst) Flash memory
    – 1 die of 128 Mbit (4 Banks of 2Mb x16) Low Power Synchronous Dynamic RAM
■ Supply voltage
    – VDDF = VCCP = VDDQ = 1.7 to 1.95V
    – VPPF = 9V for fast program (12V tolerant)
■ Electronic signature
    – Manufacturer Code: 20h
    – Device Code: 8819
■ Package
    – ECOPACK® (RoHS compliant)

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Datasheet: M39P0R9070E0
File Size: 247330 KB
Manufacturer: STMICROELECTRONICS [STMicroelectronics]

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