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Part Number: M68Z512
Description: The M68Z512 is a 4 Mbit (4,194,304 bit) CMOS SRAM, organized as 524,288 words by 8 bits. The device fe...


Description: The M68Z512 is a 4 Mbit (4,194,304 bit) CMOS SRAM, organized as 524,288 words by 8 bits. The device fe...
The M68Z512 is a 4 Mbit (4,194,304 bit) CMOS SRAM, organized as 524,288 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 5V ±10% supply, and all inputs and outputs are TTL compatible.
This device has an automatic power-down feature, reducing the power consumption by over 99% when deselected.
The M68Z512 is available in a 32 lead TSOP II (10 x 20mm) package.
|
Symbol |
Parameter |
Value |
Unit |
|
TA |
Ambient Operating Temperature |
0 to 70 |
°C |
|
TSTG |
Storage Temperature |
55 to 150 |
°C |
|
VIO(2) |
Input or Output Voltage |
0.3 to VCC + 0.3 |
V |
|
VCC |
Supply Voltage |
0.3 to 7.0 |
V |
|
IO(3) |
Output Current |
20 |
mA |
|
PD |
Power Dissipation |
1 |
W |
M68Z512
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