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Part Number: M74HCT373

 

 

Package Cooled: SMD

 

Description: The M54/74HCT373 and M54HCT533 are high speed CMOS OCTAL LATCH WITH 3-STATE OUTPUTS fabricated with in...


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M74HCT373 General Description


The M54/74HCT373 and M54HCT533 are high speed CMOS OCTAL LATCH WITH 3-STATE OUTPUTS fabricated with in silicon gate C2MOS technology.

These ICs achive the high speed operation similar to equivalent LSTTL while maintaning the CMOS low power dissipation.

These 8 bit D-Type latches are controlled by a latch enable input (LE) and a output enable input (OE).  While the LE input is held at a high level, the Q outputs will follow the data input precisely or inversely. When the LE is taken low, the Q outputs will be latched precisely or inversely at the logic level of D input data. While the OE input is at low level, the eight outputs will be in a normal logic state (high or low logic level) and while high level the outpts will be in a high impedance state. The application designer has a choise of combination of inverting and non inverting outputs. The three state output configuration and the wide choise of outline make bus organized system simple.

These integrated circuits have input and output characteristics that are fully compatible with 54/74 LSTTL logic families. M54/74HCT devices are designed to directly interface HSC2MOS systems with TTL and NMOS components. They are also plug in replacements for LSTTL devices giving a reduction of power consumption. All inputs are equipped with protection circuits against discharge and transient excess voltage.

M74HCT373 Maximum Ratings

Symbol
Parameter
Value
Unit
VCC
Supply Voltage
-0.5 to +7
V
VI
DC Input Voltage
-0.5 to VCC + 0.5
V
VO
DC Output Voltage
-0.5 to VCC + 0.5
V
IIK
DC Input Diode Current
± 20
mA
IOK
DC Output Diode Current
± 20
mA
IO
DC Output Source Sink Current Per Output Pin
± 35
mA
ICC or IGND
DC VCC or Ground Current
± 70
mA
PD
Power Dissipation
500 (*)
mW
Tstg
Storage Temperature
-65 to +150
°C
TL
Lead Temperature (10 sec)
300
°C
AbsoluteMaximumRatings are those values beyond whichdamage tothe device may occur. Functional operation under these condition isnotimplied.
(*) 500 mW: 65 derate to 300mWby 10mW/: 65 to85

M74HCT373 Features

HIGH SPEED tPD = 17 ns (TYP.) AT VCC = 5 V
LOWPOWER DISSIPATION ICC = 4 A (MAX.) AT TA = 25 °C
HIGH NOISE IMMUNITY VIH = 2V (MIN.) VIL = 0.8V (MAX)
OUTPUT DRIVE CAPABILITY 15 LSTTL LOADS
SYMMETRICAL OUTPUT IMPEDANCE IOH = IOL=6 mA (MIN.)
BALANCEDPROPAGATION DELAYS tPLH = tPHL
PIN AND FUNCTION COMPATIBLE WITH 54/74LS373/533

M74HCT373 Connection Diagram

M74HCT373  Connection Diagram

M74HCT373 datasheet

M74HCT373
PDF/DataSheet Download

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