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M95020,

Features: ` Compatible with SPI Bus Serial Interface (Positive Clock SPI Modes)` Single Supply Voltage: 4.5V to 5.5V for M950x0 2.5V to 5.5V for M950x0-W 1.8V to 3.6V for M950x0-S` 5 MHz Clock Rate (maximum)` Status Register` BYTE and PAGE WRITE (up to 16 Bytes)` Self-Timed Programming Cycle` Adju...

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SeekIC No. : 004407376 Detail

M95020,: Features: ` Compatible with SPI Bus Serial Interface (Positive Clock SPI Modes)` Single Supply Voltage: 4.5V to 5.5V for M950x0 2.5V to 5.5V for M950x0-W 1.8V to 3.6V for M950x0-S` 5 MHz Clock Rate ...

M95020, Data Sheet

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Part Number:
M95020,
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

` Compatible with SPI Bus Serial Interface (Positive Clock SPI Modes)
` Single Supply Voltage:
4.5V to 5.5V for M950x0
2.5V to 5.5V for M950x0-W
1.8V to 3.6V for M950x0-S
` 5 MHz Clock Rate (maximum)
` Status Register
` BYTE and PAGE WRITE (up to 16 Bytes)
` Self-Timed Programming Cycle
` Adjustable Size Read-Only EEPROM Area
` Enhanced ESD Protection
` More than 1,000,000 Erase/Write Cycles
` More than 40 Year Data Retention


Pinout

Connection Diagram


Specifications

Symbol Parameter Min. Value Unit
TSTG Storage Temperature 65 150
TLEAD Lead Temperature during
Soldering
PDIP: 10 seconds
SO: 20 seconds (max) 1
TSSOP: 20 seconds (max) 1
 260
235
235
VO Output Voltage 0.3 VCC+0.6 V
VI Input Voltage
 0.3 6.5 V
VCC Supply Voltage
 -0.3 6.5 V
VESD Electrostatic Discharge Voltage (Human Body model) 2 -4000 4000 V
Note: 1. IPC/JEDEC J-STD-020A
2. JEDEC Std JESD22-A114A (C1=100 pF, R1=1500 Ω, R2=500 Ω)


Description

The M95040 is a 4 Kbit (512 x 8) electrically eras- able programmable memory (EEPROM), access- ed by a high speed SPI-compatible bus. The other members of the family (M95020, M95010) are identical, though proportionally smaller (2 and 1 Kbit, respectively).

Each device is accessed by a simple serial interface that is SPI-compatible. The bus signals are C, D and Q, as shown in Table 1 and Figure 2.

The device is selected when Chip Select (S) is tak- en Low. Communications with the device can be interrupted using Hold (HOLD). WRITE instruc-tions are disabled by Write Protect (W).




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