MAX9153

    The MAX9153/MAX9154 low-jitter, low-voltage differential signaling (LVDS) repeaters are ideal for applications that require high-speed data or clock distribution while minimizing power, space, and noise. The devices accept a single LVDS input (MAX9153) or single LVPECL input (MAX9154) and repeat the signal at 10 LVDS outputs. Each differential output drives 100, allowing point-to-point distribution of signals on transmission lines with 100 termination at the receiver input.

    Ultra-low 90ps_p-p(max) added deterministic jitter and 1psRMS (max)added random jitter ensure reliable communication in high-speed links that are highly sensitive to timing error, especially those incorporating clock-and- data recovery or serializers and deserializers. The highpeed switching performance guarantees 800Mbps data rate and less than 60ps (max) skew between channels while operating from a single +3.3V supply.

    Supply current at 800Mbps is 118mA and reduces to 2A in power-down mode. LVDS inputs and outputs conform to the ANSI/EIA/TIA -644 standard. A fail-safe feature on the MAX9153 sets the output high when the input is undriven and open, terminated, or shorted. The MAX9153/MAX9154 are available in a 28-pin TSSOP package and are specified for the -40to +85 extended temperature range. 

    Refer to the MAX9150 data sheet for a pin-compatible 10-port LVDS repeater capable of driving a double terminated (50) LVDS link.

    Refer to the MAX9110/MAX9112 and MAX9111/MAX9113 data sheets for LVDS line drivers and receivers.