MAX9875

The MAX9875 delivers up to 725mW from a 3.7V supply into an 8 load with 87% efficiency to extend battery life. The filterless modulation scheme combined with active emissions limiting circuitry and spread-spectrum modulation greatly reduces EMI while eliminating the need for output filtering used in traditional Class D devices. The MAX9875 is available in a thermally efficient, space-saving 20-bump WLP package. The MAX9875 combines a high-efficiency Class D audio power amplifier with a stereo Class AB capacitorless DirectDriveheadphone amplifier. Maxim's 3rd generation, filterless Class D amplifier with active emissions limiting technology provides Class AB performance with Class D efficiency. The stereo Class AB headphone amplifier in the MAX9875 uses Maxim's DirectDrive architecture, that produces a ground-referenced output from a single supply, eliminating the need for large DC-blocking capacitors, saving cost, space, and component height. The device utilizes a user-defined input architecture, three preamplifier gain settings, an input mixer, volume control, comprehensive click-and-pop suppression, and I2C control.

The features of MAX9875 can be summarized as (1)low emissions, filterless class D amplifier achieves better than 10dB margin under EN55022 class b limits; (2)low RF susceptibility design rejects TDMA noise from GSM radios; (3)input mixer with user-defined input mode; (4)725mW speaker output (RSPK = 8, PVDD = 3.7V); (5)53mW headphone output (RHP = 16, VDD = 3.7V); (6)low 0.05% THD+N at 1kHz (class d power amplifier); (7)low 0.016% THD+N at 1kHz (headphone amplifier); (8)87% efficiency (RSPK = 8, POUT = 750mW); (9)high speaker amplifier PSRR (72dB at 217Hz); (10)High Headphone Amplifier PSRR (84dB at 217Hz); (11)I2C control; (12)hardware and software shutdown mode; (13)click-and-pop suppression; (14)current-limit and thermal protection; (15)available in a space-saving, 2.5mm x 2.0mm WLP package.

The absolute maximum ratings of MAX9875 are (1)VDD, PVDD to PGND: -0.3V to +5.5V; (2)VDD to PVDD: -0.3V to +0.3V; (3)VSS to PGND: -5.5V to +0.3V; (4)C1N to PGND:(VSS - 0.3V)to +0.3V; (5)C1P to PGND: -0.3V to (PVDD + 0.3V); (6)HPL, HPR to VSS (Note 1):-0.3V to the lower of (PVDD - (VSS + 0.3V))or +9V; (7)HPL, HPR to PVDD (Note 2): +0.3V to the higher of (VSS - (PVDD - 0.3V))or -9V; (8)GND to PGND: ±0.3V; (9)INA1, INA2, INB1, INB2, BIAS:-0.3V to +4V; (10)SDA, SCL: -0.3V to +5.5V; (11)all other pins to GND:-0.3V to (PVDD + 0.3V); (12)continuous current in/out of PVDD, PGND, OUT_: ±800mA; (13)continuous current in/out of HPR and HPL: 140mA; (14)continuous input current VSS: 100mA; (15)continuous input current (all other pins): ±20mA; (16)duration of OUT_ short circuit to GND or PVDD: continuous; (17)duration of short circuit between OUT+ and OUT-: continuous; (18)duration of HP_ short circuit to GND or PVDD: continuous; (19)continuous power dissipation (TA = +70°C)20-bump WLP, 5 x 4, multilayer board (derate 13.0mW/°C above +70°C): 1.04W; (20)junction temperature: +150°C; (21)operating temperature range: -40°C to +85°C; (22)storage temperature range: -65°C to +150°C; (23)lead temperature (soldering, 10s): +300°C.