MB811171622E-125

The MB811171622E-125 is a kind of CMOS synchronous dynamic random access memory (SDRAM). It contains 16,777,216 memory cells accessible in an 16-bit format. It is designed to reduce the complexity of using a standard dynamic RAM (DRAM) which requires many control signal timing constraints, and may improve data bandwidth of memory as much as 5 times more than a standard DRAM. The device is suitable for workstations, personal computers, laser printers, high resolution graphic adaptors and other applications where an extremely large memory and bandwidth are required and where a simple interface is needed.

There are some features as follows: (1)single +3.3 V supply +0.3 V tolerance; (2)LVTTL compatible I/O; (3)2K refresh cycles every 32.8 ms; (4)dual bank operation; (5)byte control by DQML/DQMU; (6)burst read/write operation and burst read/single write operation capability; (7)programmable burst type, burst length and CAS latency; (8)auto- and self-refresh (every 16s); (9)CKE power down mode; (10)output enable and input data mask.

The following is about the absolute maximum ratings: (1)voltage of VCC supply relative to VSS, VCC, VCCQ: -0.5 to +4.6 V; (2)voltage at any pin relative to VSS, VIN, VOUT: -0.5 to +4.6 V; (3)short circuit output current, IOUT: ±50 mA.