Purchase MBM29LV652UE90, In-stock MBM29LV652UE90 From SeekIC.
Part Number: MBM29LV652UE90
Description: The MBM29LV652UE is a 64M-bit, 3.0 V-only Flash memory organized as 4M words of 16 bits each. The devi...
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MBM29LV652UE90
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General Description
MBM29LV652UE90 General Description
The MBM29LV652UE is a 64M-bit, 3.0 V-only Flash memory organized as 4M words of 16 bits each. The device is designed to MBM29LV652UE be programmed in system with the standard system 3.0 V VCC supply. 12.0 V VPP and 5.0 V VCC are not required for write or erase operations. The devices can also be reprogrammed in standard EPROM programmers.
To eliminate bus contention the devices have separate chip enable (CE), write enable (WE), and output enable (OE) controls.
The MBM29LV652UE is entirely command set compatible with JEDEC single-power-supply Flash standard. Commands are written to the command register using standard microprocessor write timings. Register contents serve as input to an internal state-machine which controls the erase and programming circuitry. Write cycles also internally latch addresses and data needed for the programming and erase operations. Typically, each sector can be programmed and verified in about 0.5 seconds.
MBM29LV652UE90 Maximum Ratings
| Parameter |
Conditions |
Rating |
Units | |
|
Min |
Max | |||
| Storage Temperature |
Tstg |
55 |
+125 |
°C |
| Ambient Temperature with Power Applied |
TA |
40 |
+85 |
°C |
| Voltage with Respect to Ground All Pins except A9, OE, RESET *1, *2 |
VIN, VOUT |
0.5 |
VCC+0.5 |
V |
| Power Supply Voltage *1 |
VCC |
0.5 |
+4.0 |
V |
| A9, OE, and RESET *1, *3 |
VIN |
0.5 |
+13.0 |
V |
| WP/ACC *1, *4 |
VACC |
0.2 |
+7.0 |
V |
MBM29LV652UE90 Features
• 0.23 mm Process Technology
• Single 3.0 V read, program and erase Minimizes system level power requirements
• Compatible with JEDEC-standards Uses same software commands with single-power supply Flash
• Address don't care during the command sequence
• Industry-standard pinouts 63-ball FBGA (Package suffix: PBT)
• Minimum 100,000 program/erase cycles
• High performance 90 ns maximum access time
• Flexible sector architecture One hundred twenty-eight 32K w ord sectors
-Any combination of sectors can be concurrently erased. Also supports full chip erase
• HiddenROM region
-128 word of HiddenROM, accessible through a new "HiddenROM Enable" command sequence
-Factory serialized and protected to provide a secure electronic serial number (ESN)
• Ready/Busy Output (RY/BY)
-Hardware method for detection of program or erase cycle completion
• ACC input pin At VACC, increases program performance
• Embedded EraseTM* Algorithms utomatically pre-programs and erases the chip or any sector
• Embedded programTM* Algorithms utomatically writes and verifies data at specified address
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion
• Automatic sleep mode hen addresses remain stable, automatically switches themselves to low power mode
• Low VCC write inhibit £ 2.5 V
• Erase Suspend/Resume Suspends the erase operation to allow a read data and/or program in another sector within the same device
• Sector group protection Hardware method disables any combination of sector groups from program or erase operations
• Sector Group Protection Set function by Extended sector protect command
• Fast Programming Function by Extended Command
• Temporary sector group unprotection
-Temporary sector group unprotection via the RESET pin
-This feature allows code changes in previously locked sectors
• In accordance with CFI (Common Flash Memory Interface)
• Single 3.0 V read, program and erase Minimizes system level power requirements
• Compatible with JEDEC-standards Uses same software commands with single-power supply Flash
• Address don't care during the command sequence
• Industry-standard pinouts 63-ball FBGA (Package suffix: PBT)
• Minimum 100,000 program/erase cycles
• High performance 90 ns maximum access time
• Flexible sector architecture One hundred twenty-eight 32K w ord sectors
-Any combination of sectors can be concurrently erased. Also supports full chip erase
• HiddenROM region
-128 word of HiddenROM, accessible through a new "HiddenROM Enable" command sequence
-Factory serialized and protected to provide a secure electronic serial number (ESN)
• Ready/Busy Output (RY/BY)
-Hardware method for detection of program or erase cycle completion
• ACC input pin At VACC, increases program performance
• Embedded EraseTM* Algorithms utomatically pre-programs and erases the chip or any sector
• Embedded programTM* Algorithms utomatically writes and verifies data at specified address
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion
• Automatic sleep mode hen addresses remain stable, automatically switches themselves to low power mode
• Low VCC write inhibit £ 2.5 V
• Erase Suspend/Resume Suspends the erase operation to allow a read data and/or program in another sector within the same device
• Sector group protection Hardware method disables any combination of sector groups from program or erase operations
• Sector Group Protection Set function by Extended sector protect command
• Fast Programming Function by Extended Command
• Temporary sector group unprotection
-Temporary sector group unprotection via the RESET pin
-This feature allows code changes in previously locked sectors
• In accordance with CFI (Common Flash Memory Interface)
MBM29LV652UE90 Connection Diagram
MBM29LV652UE90
PDF/DataSheet Download
- Datasheet: MBM29LV652UE90
- File Size: 599438 KB
- Manufacturer: Fujitsu
- Click here to Download
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