Purchase MBM29SL800TD/BD-10/12, In-stock MBM29SL800TD/BD-10/12 From SeekIC.
Part Number: MBM29SL800TD/BD-10/12
Description: The MBM29SL800TD/BD are a 8 M-bit, 1.8 V-only Flash memory organized as 1 Mbytes of 8 bits each or 512...
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MBM29SL800TD/BD-10/12
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DataSheet
General Description
MBM29SL800TD/BD-10/12 General Description
The MBM29SL800TD/BD are a 8 M-bit, 1.8 V-only Flash memory organized as 1 Mbytes of 8 bits each or 512 Kwords of 16 bits each. The MBM29SL800TD/BD are offered in a 48-pin TSOP (I) , 48-ball FBGA and 48-ball SCSP packages. These devices are designed to be programmed in-system with the standard system 3.0 V VCC supply. 12.0 V VPP and 5.0 V VCC are not required for write or erase operations. The devices can also be reprogrammed in standard EPROM programmers.
MBM29SL800TD/BD-10/12 Maximum Ratings
| Parameter |
Conditions |
Rating |
Units | |
|
Min |
Max | |||
| Storage Temperature |
Tstg |
55 |
+125 |
°C |
| Ambient Temperature with Power Applied |
TA |
40 |
+85 |
°C |
| Voltage with Respect to Ground All Pins except A9, OE, RESET *1, *2 |
VIN, VOUT |
0.5 |
VCC+0.5 |
V |
| Power Supply Voltage *1 |
VCC |
0.5 |
+11.5 |
V |
| A9, OE, and RESET *1, *3 |
VIN |
0.5 |
+3.0 |
V |
MBM29SL800TD/BD-10/12 Features
• Single 1.8 V read, program, and erase Minimizes system level power requirements
• Compatible with JEDEC-standard commands Uses same software commands as E2PROMs
• Compatible with JEDEC-standard world-wide pinouts
-48-pin TSOP (I) (Package suffix : TN - Normal Bend Type, TR - Reversed Bend Type)
-48-ball FBGA (Package suffix : PBT)
-48-ball SCSP (Package suffix : PW)
• Minimum 100,000 program/erase cycles
• High performance 100 ns maximum access time
• Sector erase architecture
-One 8 Kword, two 4 Kwords, one 16 Kword, and fifteen 32 Kwords sectors in word mode
-One 16 Kbyte, two 8 Kbytes, one 32 Kbyte, and fifteen 64 Kbytes sectors in byte mode
-Any combination of sectors can be concurrently erased. Also supports full chip erase
• Boot Code Sector Architecture
-T = Top sector
-B = Bottom sector
• Embedded EraseTM Algorithms Automatically pre-programs and erases the chip or any sector
• Embedded ProgramTM Algorithms Automatically writes and verifies data at specified address
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion
• Ready/Busy output (RY/BY) Hardware method for detection of program or erase cycle completion
• Automatic sleep mode When addresses remain stable, automatically switch themselves to low power mode
• Erase Suspend/Resume Suspends the erase operation to allow a read in another sector within the same device
• Sector protection Hardware method disables any combination of sectors from program or erase operations
• Sector Protection set function by Extended sector Protect command
• Fast programming Function by Extended Command
• Temporary sector unprotection Temporary sector unprotection via the RESET pin
• Compatible with JEDEC-standard commands Uses same software commands as E2PROMs
• Compatible with JEDEC-standard world-wide pinouts
-48-pin TSOP (I) (Package suffix : TN - Normal Bend Type, TR - Reversed Bend Type)
-48-ball FBGA (Package suffix : PBT)
-48-ball SCSP (Package suffix : PW)
• Minimum 100,000 program/erase cycles
• High performance 100 ns maximum access time
• Sector erase architecture
-One 8 Kword, two 4 Kwords, one 16 Kword, and fifteen 32 Kwords sectors in word mode
-One 16 Kbyte, two 8 Kbytes, one 32 Kbyte, and fifteen 64 Kbytes sectors in byte mode
-Any combination of sectors can be concurrently erased. Also supports full chip erase
• Boot Code Sector Architecture
-T = Top sector
-B = Bottom sector
• Embedded EraseTM Algorithms Automatically pre-programs and erases the chip or any sector
• Embedded ProgramTM Algorithms Automatically writes and verifies data at specified address
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion
• Ready/Busy output (RY/BY) Hardware method for detection of program or erase cycle completion
• Automatic sleep mode When addresses remain stable, automatically switch themselves to low power mode
• Erase Suspend/Resume Suspends the erase operation to allow a read in another sector within the same device
• Sector protection Hardware method disables any combination of sectors from program or erase operations
• Sector Protection set function by Extended sector Protect command
• Fast programming Function by Extended Command
• Temporary sector unprotection Temporary sector unprotection via the RESET pin
MBM29SL800TD/BD-10/12 Connection Diagram
MBM100A6
PDF/DataSheet Download
- Datasheet: MBM100A6
- File Size: 79491 KB
- Manufacturer: HITACHI [Hitachi Semiconductor]
- Click here to Download
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The MBM29SL800TD/BD are a 8 M-bit, 1.8 V-only Flash memory organized as 1 Mbytes of 8 bits each or 512 Kwords of 16 bits each. The MBM29SL800TD/BD are offered in a 48-pin TSOP (I) , 48-ball FBGA and 48-ball SCSP packages. These devices are designed to be pro...
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The MBM29SL800BD are a 8 M-bit, 1.8 V-only Flash memory organized as 1 Mbytes of 8 bits each or 512 Kwords of 16 bits each. The MBM29SL800TD/BD are offered in a 48-pin TSOP (I) , 48-ball FBGA and 48-ball SCSP packages. These devices are designed to be progra...
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