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Part Number: MC-4564EC727
Description: The MC-4564EC727 is a 67,108,864 words by 72 bits synchronous dynamic RAM module on which 36 pieces of...
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MC-4564EC727
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General Description
MC-4564EC727 General Description
The MC-4564EC727 is a 67,108,864 words by 72 bits synchronous dynamic RAM module on which 36 pieces of 128 M SDRAM: µPD45128441 are assembled. This module provides high density and large quantities of memory in a small space without utilizing the surface mounting technology on the printed circuit board. Decoupling capacitors are mounted on power supply line for noise reduction.
MC-4564EC727 Maximum Ratings
| Parameter | Symbol |
Conditiongs
|
Ratings | Unit |
| Voltage on power supply pin relative to GND | VCC | 0.5 to +4.6V | V | |
| Voltage on input pin relative to GND | VT | 0.5 to +4.6V | V | |
| Short circuit output current | LO | 50 | mA | |
| Power dissipation | PD | 40 | W | |
| Operating ambient temperature | Tj | 150 | °C | |
| Storage temperature | Tstg | -55 to +150 | °C |
MC-4564EC727 Features
• 67,108,864 words by 72 bits organization (ECC type)
• Clock frequency and access time from CLK
• Fully Synchronous Dynamic RAM, with all signals referenced to a positive clock edge
• Pulsed interface
• Possible to assert random column address in every cycle
• Quad internal banks controlled by BA0 and BA1 (Bank Select)
• Programmable burst-length(1, 2, 4, 8 and Full Page)
• Programmable wrap sequence (Sequential / Interleave)
• Programmable /CAS latency (2, 3)
• Automatic precharge and controlled precharge
• CBR (Auto) refresh and self refresh
• All DQs have 10 Ω ±10 % of series resistor
• Single 3.3 V ±0.3 V power supply
• LVTTL compatible
• 4,096 refresh cycles/64 ms
• Burst termination by Burst Stop command and Precharge command
• 168-pin dual in-line memory module (Pin pitch = 1.27 mm)
• Registered type
• Serial PD
• Stacked monolithic technology
• Clock frequency and access time from CLK
• Fully Synchronous Dynamic RAM, with all signals referenced to a positive clock edge
• Pulsed interface
• Possible to assert random column address in every cycle
• Quad internal banks controlled by BA0 and BA1 (Bank Select)
• Programmable burst-length(1, 2, 4, 8 and Full Page)
• Programmable wrap sequence (Sequential / Interleave)
• Programmable /CAS latency (2, 3)
• Automatic precharge and controlled precharge
• CBR (Auto) refresh and self refresh
• All DQs have 10 Ω ±10 % of series resistor
• Single 3.3 V ±0.3 V power supply
• LVTTL compatible
• 4,096 refresh cycles/64 ms
• Burst termination by Burst Stop command and Precharge command
• 168-pin dual in-line memory module (Pin pitch = 1.27 mm)
• Registered type
• Serial PD
• Stacked monolithic technology
MC-4564EC727 Connection Diagram
MC-4564EC727
PDF/DataSheet Download
- Datasheet: MC-4564EC727
- File Size: 186971 KB
- Manufacturer: NEC [NEC]
- Click here to Download
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MC-4564EC726
The MC-4564EC726 is a 67,108,864 words by 72 bits synchronous dynamic RAM module on which 36 pieces of 128 M SDRAM: µPD45128441 are assembled.MC-4564EC726 provide high density and large quantities of memory in a small space without utilizing the surfac...
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