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Part Number: MC54HC640A
Description: The MC54/74HC640A is identical in pinout to the LS640. The device inputs are compatible with standard ...
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MC54HC640A
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DataSheet
General Description
MC54HC640A General Description
The MC54/74HC640A is identical in pinout to the LS640. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.
The HC640A is a 3state transceiver that is used for 2way asynchronous communication between data buses. The device has an activelow Output Enable pin, which is used to place the I/O ports into highimpedance states. The Direction control determines whether data flows from A to B or from B to A.
MC54HC640A Maximum Ratings
| Symbol | Parameter | Value | Unit |
| vcc | DC Supply Voltage (Referenced to GND) | 0.5 to +7.0 | V |
| VIN | DC Input Voltage (Referenced to GND) | 0.5 to VCC + 0.5 | V |
| VOUT | DC Output Voltage (Referenced to GND) | 0.5 to VCC + 0.5 | V |
| LIN | DC Input Current, per Pin | ±20 | mA |
| IOUT | DC Onput Current, per Pin | ±35 | mA |
| ICC | DC Supply Current Per Supply Pin | ±75 | mA |
| PD | Power dissipation in still air piastic DIP SOIC package |
750 500 |
mW |
| TSTG | Storage Temperature | 65 to +150 | °C |
| TL | Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) |
260 | °C |
Functional operation should be restricted to the Recommended Operating Conditions.
†Derating - Plastic DIP: 10 mW/C from 65 to 125C
Ceramic DIP: 10 mW/C from 100 to 125C
SOIC Package: 7 mW/C from 65 to 125C
For high frequency or heavy load considerations, see Chapter 2 of the Motorola HighSpeed CMOS Data Book (DL129/D).
MC54HC640A Features
• Output Drive Capability: 15 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2 to 6 V
• Low Input Current: 1 mA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard No. 7A
• Chip Complexity: 276 FETs or 69 Equivalent Gates
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2 to 6 V
• Low Input Current: 1 mA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard No. 7A
• Chip Complexity: 276 FETs or 69 Equivalent Gates
MC54HC640A Connection Diagram
MC500
PDF/DataSheet Download
- Datasheet: MC500
- File Size: 337495 KB
- Manufacturer: ETC [ETC]
- Click here to Download
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