MC74AC4040

The MC74AC4040 consists of 12 master-slave flip-flops and whose output feeds the next individually and the frequency at each output is half that of the preceding one. Reset is asynchronous and active-high. State changes of the Q outputs do not occur simultaneously because of internal ripple delays. Therefore, decoded output signals are subject to decoding spikes and may have to be gated with the Clock of the MC74AC4040 for some designs. The state of the counter advances on the negative-going edge of the Clock input.

The features of MC74AC4040 can be summarized as (1)140 MHz Typ. clock; (2)outputs source/sink 24 mA; (3)operating voltage range: 2.0 to 6.0 V; (4)high noise immunity.

The absolute maximum ratings of MC74AC4040 are (1)VCC DC supply voltage (referenced to GND): 0.5 to +7.0 V; (2)Vin DC input voltage (referenced to GND): 0.5 to VCC +0.5 V; (3)Vout DC output voltage (referenced to GND): 0.5 to VCC +0.5 V; (4)Iin DC input current, per pin: ±20 mA; (5)Iout DC output current, per pin: ±50 mA; (6)ICC DC VCC or GND current per output pin: ±50 mA; (7)PD power dissipation in still air plastic( 10mW/°C from 65°C to 125°C)/SOIC package( 7.0 mW/°C from 65°C to 125°C): 750/500mW; (8)Tstg storage temperature: 65 to +150 °C; (9)TL lead temperature, 1 mm from case for 10 seconds(Plastic DIP or SOIC Package): 260 °C.