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Package Cooled:TSSOP  D/C:96+  

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Part Number: MC74HC4060A

 

 

Package Cooled: TSSOP

D/C: 96+

Description: The MC54/74C4060A is identical in pinout to the standard CMOS MC14060B. The device inputs are compatib...


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MC74HC4060A General Description


The MC54/74C4060A is identical in pinout to the standard CMOS MC14060B. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.

This device consists of 14 masterslave flipflops and an oscillator with a frequency that is controlled either by a crystal or by an RC circuit connected externally. The output of each flipflop feeds the next and the frequency at each output is half of that of the preceding one. The state of the counter advances on the negativegoing edge of the Osc In. The activehigh Reset is asynchronous and disables the oscillator to allow very low power consumption during standby operation.

State changes of the Q outputs do not occur simultaneously because of internal ripple delays. Therefore, decoded output signals are subject to decoding spikes and may have to be gated with Osc Out 2 of the HC4060A.

MC74HC4060A Maximum Ratings

Symbol
Parameter
Value
Unit
VCC
DC Supply Voltage (Referenced to GND)
0.5 to +7.0
V
Vin
DC Input Voltage (Referenced to GND)
0.5 to VCC +0.5
V
Vout
DC Output Voltage (Referenced to GND)
0.5 to VCC + 0.5
V
Iin
DC Input Current, per Pin
± 20
mA
Iout
DC Output Current, per Pin
± 25
mA
ICC
DC Supply Current, VCC and GND Pins
± 50
mA
PD
Power Dissipation in Still Air, Plastic or Ceramic DIP†
SOIC Package†
TSSOP Package†
750
500
450
mW
Tstg
Storage Temperature
65 to + 150
TL
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP, SOIC or TSSOP Package)
(Ceramic DIP)

260
300
*Maximum Ratings are those values beyond which damage to the device may occur.Functional operation
  should be restricted to the Recommended Operating Conditions.
  †Derating - Plastic DIP: 10 mW/ from 65 ° to 125
  Ceramic DIP: 10 mW/ from 100 ° to 125
  SOIC Package: 7 mW/ from 65° to 125C
  TSSOP Package: 6.1 mW/ from 65° to 125

For high frequency or heavy load considerations, see Chapter 2 of the Motorola HighSpeed CMOS Data Book (DL129/D).

This device contains protection circuitry to guard against damage due to high static voltages or electric fields.However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this highimpedance circuit. For proper operation, Vin and Vout should be constrained to the range GND (Vin or Vout) VCC.

Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.

MC74HC4060A Features

• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2 to 6 V
• Low Input Current: 1 A
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance With JEDEC Standard No. 7A Requirements
• Chip Complexity: 390 FETs or 97.5 Equivalent Gates

MC74HC4060A Connection Diagram

MC74HC4060A  Connection Diagram

MC74HC4060A datasheet

MC74HC4060A
PDF/DataSheet Download

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