MFG:ON Package Cooled:20 LEAD PDIP D/C:07+
MFG: ON
Package Cooled: 20 LEAD PDIP
D/C: 07+
Description: The MC74HCT373A may be used as a level converter for interfacing TTL or NMOS outputs to HighSpeed CMOS...
The MC74HCT373A may be used as a level converter for interfacing TTL or NMOS outputs to HighSpeed CMOS inputs. The HCT373A is identical in pinout to the LS373.
The eight latches of the HCT373A are transparent Dtype latches. While the Latch Enable is high the Q outputs follow the Data Inputs. When Latch Enable is taken low, data meeting the setup and hold times becomes latched.
The Output Enable does not affect the state of the latch, but when Output Enable is high, all outputs are forced to the highimpedance state. Thus, data may be latched even when the outputs are not enabled.
The HCT373A is identical in function to the HCT573A, which has the input pins on the opposite side of the package from the output pins. This device is similar in function to the HCT533A, which has inverting outputs.
| Symbol | Parameter | Value | Unit |
| vcc | DC Supply Voltage (Referenced to GND) | 0.5 to +7.0 | V |
| VIN | DC Input Voltage (Referenced to GND) | 0.5 to VCC + 0.5 | V |
| VOUT | DC Output Voltage (Referenced to GND) | 0.5 to VCC + 0.5 | V |
| LIN | DC Input Current, per Pin | ±20 | mA |
| IOUT | DC Onput Current, per Pin | ±35 | mA |
| ICC | DC Supply Current Per Supply Pin | ±75 | mA |
| PD | Power dissipation in still air piastic DIP SOIC package |
750 500 |
mW |
| TSTG | Storage Temperature | 65 to +150 | °C |
| TL | Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) |
260 | °C |
MC705C8ACFNR2
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