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MFG:ON  Package Cooled:20 LEAD PDIP  D/C:07+  

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Part Number: MC74HCT374AN

 

MFG: ON

Package Cooled: 20 LEAD PDIP

D/C: 07+

Description: The MC74HCT374A may be used as a level converter for interfacing TTL or NMOS outputs to HighSpeed CMOS...


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MC74HCT374AN General Description


The MC74HCT374A may be used as a level converter for interfacing TTL or NMOS outputs to HighSpeed CMOS inputs. The HCT374A is identical in pinout to the LS374.

Data meeting the setup and hold time is clocked to the outputs with the rising edge of Clock. The Output Enable does not affect the state of the flipflops, but when Output Enable is high, the outputs are forced to the highimpedance state. Thus, data may be stored even when the outputs are not enabled.

The HCT374A is identical in function to the HCT574A, which has the input pins on the opposite side of the package from the output pins. This device is similar in function to the HCT534A, which has inverting outputs.

MC74HCT374AN Maximum Ratings

Symbol Parameter Value Unit
vcc DC Supply Voltage (Referenced to GND) 0.5 to +7.0 V
VIN DC Input Voltage (Referenced to GND) 0.5 to VCC + 0.5 V
VOUT DC Output Voltage (Referenced to GND) 0.5 to VCC + 0.5 V
LIN DC Input Current, per Pin ±20 mA
IOUT DC Onput Current, per Pin ±35 mA
ICC DC Supply Current Per Supply Pin ±75 mA
PD Power dissipation in still air piastic DIP
SOIC package
750
500
mW
TSTG Storage Temperature 65 to +150 °C
TL Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
260 °C
Functional operation should be restricted to the Recommended Operating Conditions.
†Derating - Plastic DIP: 10 mW/C from 65 to 125C
SOIC Package: 7 mW/C from 65 to 125C
TSSOP Package: 6.1 mW/C from 65 to 125C
For high frequency or heavy load considerations, see Chapter 2 of the Motorola HighSpeed CMOS Data Book (DL129/D).

MC74HCT374AN Features

• Output Drive Capability: 15 LSTTL Loads
• TTL/NMOSCompatible Input Levels
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 4.5 to 5.5 V
• Low Input Current: 1.0 mA
• In Compliance with the Requirements Defined by JEDEC Standard No. 7A
• Chip Complexity: 276 FETs or 69 Equivalent Gates
• Improvements over HCT374
- Improved Propagation Delays
- 50% Lower Quiescent Power
- Improved Input Noise and Latchup Immunity

MC74HCT374AN Connection Diagram

MC74HCT374AN  Connection Diagram

MC74HCT374AN datasheet

MC705C8ACFNR2
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