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MC92052

Features: • Implements the DAVIC short-range baseband asymmetrical physical layer standard• Supports a bit rate of up to 51.84 Mbit/sec downstream• Provides TDMA at a bit rate of up to 6.48 Mbit/s upstream, including DAVIC Bit Rates B, C, and D• Interfaces to an ATM-layer d...

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SeekIC No. : 004417348 Detail

MC92052: Features: • Implements the DAVIC short-range baseband asymmetrical physical layer standard• Supports a bit rate of up to 51.84 Mbit/sec downstream• Provides TDMA at a bit rate of u...

MC92052 Data Sheet

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Part Number:
MC92052
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• Implements the DAVIC short-range baseband asymmetrical physical layer standard
• Supports a bit rate of up to 51.84 Mbit/sec downstream
• Provides TDMA at a bit rate of up to 6.48 Mbit/s upstream, including DAVIC Bit Rates B, C, and D
• Interfaces to an ATM-layer device using a UTOPIA compliant interface
• Performs convolutional deinterleaving of the downstream payload blocks for the full range of interleaving depths (M = 1-31) using an external 16K x 8 SRAM
• Can optionally use an internal RAM for deinterleaving when the interleaving depth is small (M £ 2)
• Performs Reed-Solomon encoding of the upstream frames and decoding of the downstream frames
• Performs HEC-based cell delineation and error correction on the downstream data
• Optionally filters received ATM cells based on GFC/VPI pattern matching
• Includes serial data interfaces to a Physical Medium Dependent (PMD) sublayer device
• Optional serial data link interfaces for upstream and downstream frames
• Includes a power level control interface to the transmitter
• Provides an 8-bit system interface as a generic slave device
• IEEE 1149.1 (JTAG) boundary scan test port
• 3.3 V operation with TTL compatibility on I/O pins
• Extended temperature operation: -40 to 85 °C
• Available in 128 Pin Plastic Quad Flat Package


Application

The primary application of the MC92052 is to provide TC-sublayer processing functions for a user device, e.g., a set-top box, in an FTTC network. Figure 2 shows the location of the user device within an FTTC network using a passive network termination. Figure 3 shows a generic user device architecture using the MC92052. The MC92052 uses an external memory for convolutional interleaving of the downstream data. If the interleaving depth is very small or if interleaving is not used, the external memory is not required.




Description

The MC92052 is a peripheral device for the user side of an FTTC drop. It is composed of downstream and upstream
TC-sublayer functionality with UTOPIA compliant ATM-layer ports.




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