Purchase MC9S12E, In-stock MC9S12E From SeekIC.
- Table of contents:
MC9S12E
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Suppliers
DataSheet
General Description
MC9S12E Features
• 16-bit HCS12 CORE
HCS12 CPU
i. Upward compatible with M68HC11 instruction set
ii. Interrupt stacking and programmer's model identical to M68HC11
iii. Instruction queue
iv. Enhanced indexed addressing
Module Mapping Control (MMC)
Interrupt Control (INT)
Background Debug Module (BDM)
Debugger (DBG12) including breakpoints and change-of-flow trace buffer
Multiplexed External Bus Interface (MEBI)
• Wake-Up interrupt inputs
Up to 16 port bits available for wake up interrupt function with digital filtering
• Memory options
32K, 64K, 128K or 256K Byte Flash EEPROM
2K, 4K, 8K or 16K Byte RAM
• Two 1-channel Digital-to-Analog Converters (DAC)
8-bit resolution
• Analog-to-Digital Converter (ADC)
16-channel module with 10-bit resolution
External conversion trigger capability
• Three 4-channel Timers (TIM)
Programmable input capture or output compare chann
Simple PWM mode
Counter Modulo Reset
External Event Counting
Gated Time Accumulation
• 6 PWM channels (PWM)
Programmable period and duty cycle
8-bit 6-channel or 16-bit 3-channel
Separate control for each pulse width and duty cycle
Center-aligned or left-aligned outputs
Programmable clock select logic with a wide range of
Fast emergency shutdown input
• 6-channel Pulse width Modulator with Fault protection (P
Three independent 15-bit counters with synchronous
Complementary channel operation
Edge and center aligned PWM signals
Programmable dead time insertion
Integral reload rates from 1 to 16
Four fault protection shut down input pins
Three current sense input pins
• Serial interfaces
Three asynchronous serial communication interfaces (SCI)
Synchronous serial peripheral interface (SPI)
Inter-IC Bus (IIC)
• Clock and Reset Generator (CRG)
Windowed COP watchdog
Real Time interrupt
Clock Monitor
Pierce or low current Colpitts oscillator
Phase-locked loop clock frequency multiplier
Self Clock mode in absence of external clock
Low power 0.5 to 16Mhz crystal oscillator reference clock
• Operating frequency
50MHz equivalent to 25MHz Bus Speed
• Internal 2.5V Regulator
Input voltage range from 3.135V to 5.5V
Low power mode capability
Includes low voltage reset (LVR) circuitry
Includes low voltage interrupt (LVI) circuitry
• 112-Pin LQFP or 80-Pin QFP package
Up to 90 I/O lines with 5V input and drive capability (112 pin package)
Up to two dedicated 5V input only lines (IRQ and XIRQ)
Sixteen 3.3V/5V A/D converter inputs
• Development Support.
Single-wire background debugTM mode
On-chip hardware breakpoints
Enhanced debug features
HCS12 CPU
i. Upward compatible with M68HC11 instruction set
ii. Interrupt stacking and programmer's model identical to M68HC11
iii. Instruction queue
iv. Enhanced indexed addressing
Module Mapping Control (MMC)
Interrupt Control (INT)
Background Debug Module (BDM)
Debugger (DBG12) including breakpoints and change-of-flow trace buffer
Multiplexed External Bus Interface (MEBI)
• Wake-Up interrupt inputs
Up to 16 port bits available for wake up interrupt function with digital filtering
• Memory options
32K, 64K, 128K or 256K Byte Flash EEPROM
2K, 4K, 8K or 16K Byte RAM
• Two 1-channel Digital-to-Analog Converters (DAC)
8-bit resolution
• Analog-to-Digital Converter (ADC)
16-channel module with 10-bit resolution
External conversion trigger capability
• Three 4-channel Timers (TIM)
Programmable input capture or output compare chann
Simple PWM mode
Counter Modulo Reset
External Event Counting
Gated Time Accumulation
• 6 PWM channels (PWM)
Programmable period and duty cycle
8-bit 6-channel or 16-bit 3-channel
Separate control for each pulse width and duty cycle
Center-aligned or left-aligned outputs
Programmable clock select logic with a wide range of
Fast emergency shutdown input
• 6-channel Pulse width Modulator with Fault protection (P
Three independent 15-bit counters with synchronous
Complementary channel operation
Edge and center aligned PWM signals
Programmable dead time insertion
Integral reload rates from 1 to 16
Four fault protection shut down input pins
Three current sense input pins
• Serial interfaces
Three asynchronous serial communication interfaces (SCI)
Synchronous serial peripheral interface (SPI)
Inter-IC Bus (IIC)
• Clock and Reset Generator (CRG)
Windowed COP watchdog
Real Time interrupt
Clock Monitor
Pierce or low current Colpitts oscillator
Phase-locked loop clock frequency multiplier
Self Clock mode in absence of external clock
Low power 0.5 to 16Mhz crystal oscillator reference clock
• Operating frequency
50MHz equivalent to 25MHz Bus Speed
• Internal 2.5V Regulator
Input voltage range from 3.135V to 5.5V
Low power mode capability
Includes low voltage reset (LVR) circuitry
Includes low voltage interrupt (LVI) circuitry
• 112-Pin LQFP or 80-Pin QFP package
Up to 90 I/O lines with 5V input and drive capability (112 pin package)
Up to two dedicated 5V input only lines (IRQ and XIRQ)
Sixteen 3.3V/5V A/D converter inputs
• Development Support.
Single-wire background debugTM mode
On-chip hardware breakpoints
Enhanced debug features
MC9S12E Connection Diagram
MC9S12E
PDF/DataSheet Download
- Datasheet: MC9S12E
- File Size: 3151075 KB
- Manufacturer: MOTOROLA [Motorola, Inc]
- Click here to Download
- ·MC908AP16ACB
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