MD56V62320

Features: • Silicon gate, quadruple polysilicon CMOS, 1-transistor memory cell• 4-bank x 524,288-word x 32-bit configuration• 3.3 V power supply, ±0.3 V tolerance• Input : LVTTL compatible• Output : LVTTL compatible• Refresh : 4096 cycles/64 ms• Programmab...

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MD56V62320 Picture
SeekIC No. : 004418859 Detail

MD56V62320: Features: • Silicon gate, quadruple polysilicon CMOS, 1-transistor memory cell• 4-bank x 524,288-word x 32-bit configuration• 3.3 V power supply, ±0.3 V tolerance• Input : LV...

floor Price/Ceiling Price

Part Number:
MD56V62320
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/6/15

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Product Details

Description



Features:

• Silicon gate, quadruple polysilicon CMOS, 1-transistor memory cell
• 4-bank x 524,288-word x 32-bit configuration
• 3.3 V power supply, ±0.3 V tolerance
• Input : LVTTL compatible
• Output : LVTTL compatible
• Refresh : 4096 cycles/64 ms
• Programmable data transfer mode
 CAS latency (2, 3)
Burst length (2, 4, 8)
Data scramble (sequential, interleave)
• CBR auto-refresh, Self-refresh capability
• Package: 86-pin 400 mil plastic TSOP (Type II) (TSOPII86-P-400-0.50-K) (Product : MD56V62320-xxTA) xx indicates speed rank.



Pinout

  Connection Diagram


Specifications

Parameter
Symbol
Rating
Unit
Voltage on Any Pin Relative to VSS
VIN, VOUT
0.5 to VCC + 0.5
V
VCC Supply Voltage
VCC, VCCQ
0.5 to 4.6
V
Storage Temperature
Tstg
55 to 150
°C
Power Dissipation
PD*
1
W
Short Circuit Current
IOS
50
mA
Operating Temperature
Topr
0 to 70
°C



Description

The MD56V62320 is a 4-bank x 524,288-word x 32-bit synchronous dynamic RAM, fabricated in Oki's CMOS silicon-gate process technology. The device operates at 3.3 V. The inputs and outputs are LVTTL compatible.




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