MH16S72AVJB-6

Features:

Type name	Max. Frequency	Access Time from CLK [component level]
MH16S72AVJB-6	133MHz	5.4ns (CL = 4 at Latch mode)

·Utilizes industry standard 16M X 8 Synchronous DRAMs in TSOP package , industry standard Resistered buffer in  TSSOP package,industry standard PLL in  TSSOP package
·Single 3.3V +/- 0.3V supply
·Max.Clock frequency  133MHz
·Fully synchronous operation referenced to clock rising edge
·4-bank operation controlled by BA0,BA1(Bank Address)
·/CAS latency -2/3(programmable,at buffer mode)
·LVTTL Interface
·Burst length 1/2/4/8/Full Page(programmable)
·Burst type- Sequential and interleave burst (programmable)
·Random column access
·Burst Write / Single Write(programmable)
·Auto precharge / All bank precharge controlled by A10
·Auto refresh and Self refresh
·4096 refresh cycles every 64ms Discrete IC and module design conform to PC133 specification.


Specifications

Symbol	Parameter	Condition	Ratings	Unit
Vdd	Supply Voltage	with respect to Vss	-0.5 ~ 4.6	V
VI	Input Voltage	with respect to Vss	-0.5 ~ 4.6	V
VO	Output Voltage	with respect to Vss	-0.5 ~ 4.6	V
IO	Output Current		50	mA
Pd	Power Dissipation	Ta=25	12	W
Topr	Operating Temperature		0 ~ 70
Tstg	Storage Temperature		-40 ~ 100

Description

The MH16S72AVJB is 16777216 - word x 72-bit Sy nchronous DRAM module. This consist of nine industry standard 16M x 8 Sy nchronous DRAMs in TSOP.

The TSOP on a card edge dual in-line package of MH16S72AVJB prov ides any application where high densities and large of quantities memory arerequired.

MH16S72AVJB is a socket-ty pe memory module ,suitable f or easy interchange or addition of module.