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MFG:ATMEL  D/C:08+  

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Part Number: MH1RT

 

MFG: ATMEL

 

D/C: 08+

Description: The MH1RT Series Gate Array and Embedded Array families from Atmel are fabricated on a radiation toler...


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MH1RT General Description


The MH1RT Series Gate Array and Embedded Array families from Atmel are fabricated on a radiation tolerant 0.35 micron CMOS process, with up to 4 levels of metal for interconnect. This family features arrays with up to 1.6 million routable gates and 596 pads. The high density and high pin count capabilities of the MH1RT family, coupled with the ability to embed cores or memory on the same silicon, makes the MH1RT series of arrays an ideal choice for System Level Integration.

The MH1RT series is supported by an advanced software environment based on industry standards linking proprietary and commercial tools. Verilog®, DFT®, Synopsys ® and Vital are the reference front end tools. The Cadence® 'Logic Design Planner' floor planning associated with timing driven layout provides an efficient back end cycle.

The MH1RT series comes as a dual use of the MH1 series, adding:
- through process changes, the 100 MeV latch-up immunity and the 200K rads+ total dose capability as required by most space programs
- through cells relayout, an SEU immunity allowing to SEU harden only where it is necessary with respect to function requirements

With a background of 15 years experience, the MH1RT series comes as the Atmel 7th generation of ASIC series designed for radiation hardened applications.

MH1RT Maximum Ratings

Operating Ambient Temperature .........-55°C to +125°C
Storage Temperature........................... -65°C to +150°C
Maximum Input Voltage VDD ...+0.5V and VCC + 0.5V
Maximum 3.3V Operating Voltage................. 4V (VDD)
Maximum 5V Operating Voltage.................... 6V (VCC)

NOTE: Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

MH1RT Features

• High Speed - 180 ps Gate Delay - 2 Input NAND, FO = 2 (nominal)
• Up to 1.198M Used Gates and 512 Pads with 3.3V, 3V and 2.5V Libraries when Tested to Space Quality Grades
• Up to 1.6M Used Gates and 596 Pads with 3.3V, 3V and 2.5V Libraries when Tested to Military Quality Grades
• System Level Integration Technology Cores on Request:
    Memory: SRAMs and TPRAMs; Gate Level or Embedded, with EDACS
• I/O Interfaces:
    5V Tolerant/Compliant (S) or 3V (R) Matrix Options
    CMOS, LVTTL, LVDS, PCI, USB, etc.
    Output Currents Programmable from 2 to 24 mA, by Step of 2 mA
    Cold Sparing Buffers (2 µA Max. Leakage Current at 3.6V Worst Case Mil Temp.)
• 250 MHz PLL (on request), 220 MHz LVDS and 800 MHz Max. Toggle Frequency at 3.3V
• Deep Submicron CAD Flow
• Latch-up Immune, 200K rads Total Dose Capability, SEU Free Cells and 4000V ESD Protection
• QML Q and V with SMD 5962-01B01

MH1RT datasheet

MH1RT
PDF/DataSheet Download

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