Purchase MH8S72PHC -10, In-stock MH8S72PHC -10 From SeekIC.
Part Number: MH8S72PHC -10
Description: The MH8S72PHC is 8388608 - word by 72-bit Synchronous DRAM module. This consists of five industry standard 8Mx16 Synchr...
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MH8S72PHC -10
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DataSheet
General Description
MH8S72PHC -10 General Description
The MH8S72PHC is 8388608 - word by 72-bit Synchronous DRAM module. This consists of five industry standard 8Mx16 Synchronous DRAMs in TSOP and one industory standard EEPROM in TSSOP.
The mounting of TSOP on a card edge Dual Inline package provides any application where high densities and large quantities of memory are required.
This is a socket type - memory modules, suitable for easy interchange or addition of modules.
MH8S72PHC -10 Maximum Ratings
|
Symbol |
Parameter |
Conditions |
Ratings |
Unit |
|
Vdd |
Supply voltage |
With respect to Vss |
-0.5~ 4.6 |
V |
|
VI |
Input Voltage |
With respect to Vss |
-0.5~ 4.6 |
V |
|
VO |
Output Voltage |
With respect to Vss |
-0.5~ 4.6 |
V |
|
IO |
Output Current |
50 |
mA | |
|
Pd |
Power Dissipation |
Ta=25°C |
5 |
W |
|
Topr |
Operating Temperature |
0~70 |
°C | |
|
Tstg |
Storage Temperature |
-40~100 |
°C |
MH8S72PHC -10 Features
·Utilizes industry standard 8M x 16 Synchronous DRAMs TSOP and industry standard EEPROM in TSSOP
·168-pin (84-pin dual in-line package)
·single 3.3V±0.3V power supply
·Clock frequency 100MHz
·Fully synchronous operation referenced to clock rising edge
·4 bank operation controlled by BA0,1(Bank Address)
·/CAS latency- 2/3(programmable)
·Burst length- 1/2/4/8/Full Page(programmable)
·Burst type- sequential / interleave(programmable)
·Column access - random
·Auto precharge / All bank precharge controlled by A10
·Auto refresh and Self refresh
·4096 refresh cycle /64ms
·LVTTL Interface PC100 specification.
(module Spec. Rev. 1.0 and SPD 1.2A(-7,-8) SPD1.0(-10))
·168-pin (84-pin dual in-line package)
·single 3.3V±0.3V power supply
·Clock frequency 100MHz
·Fully synchronous operation referenced to clock rising edge
·4 bank operation controlled by BA0,1(Bank Address)
·/CAS latency- 2/3(programmable)
·Burst length- 1/2/4/8/Full Page(programmable)
·Burst type- sequential / interleave(programmable)
·Column access - random
·Auto precharge / All bank precharge controlled by A10
·Auto refresh and Self refresh
·4096 refresh cycle /64ms
·LVTTL Interface PC100 specification.
(module Spec. Rev. 1.0 and SPD 1.2A(-7,-8) SPD1.0(-10))
MH8S72PHC -10 Typical Application
PC main memory
MH8S72PHC -10
PDF/DataSheet Download
- Datasheet: MH8S72PHC -10
- File Size: 603556 KB
- Manufacturer: Mitsubishi
- Click here to Download
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