Purchase MH8V725BAZTJ -6, In-stock MH8V725BAZTJ -6 From SeekIC.


Part Number: MH8V725BAZTJ -6
Description: The MH8V725BAZTJ is 8388608-word x 72-bit dynamic ram module. This consist of nine industry standard 8M x 8 dynamic RAM...


Description: The MH8V725BAZTJ is 8388608-word x 72-bit dynamic ram module. This consist of nine industry standard 8M x 8 dynamic RAM...
|
Symbol |
Parameter |
Conditions |
Ratings |
Unit |
| Vcc | Supply voltage | With respect to Vss |
-0.5~ 4.6 |
V |
| IO | Output current |
50 |
mA | |
| Pd | Power dissipation | Ta=25°C |
10.7 |
W |
| Topr | Operating temperature |
0~70 |
°C | |
| Tstg | Storage temperature |
-40~100 |
°C |
·Utilizes industry standard 8M x 8 RAMs in TSOP and industry standard input buffer in TSSOP
·168-pin (84-pin dual dual in-line package)
·Single +3.3V(±0.3V) supply operation
·Low stand-by power dissipation
116.2mW(Max) . . . . . . . . . . LVCMOS input level
·Low operation power dissipation
MH8V725BAZTJ -5 . . . . . . . . . . . . . . . . . . 3.34W(Max)
MH8V725BAZTJ -6 . . . . . . . . . . . . . . . . . . 3.02W(Max)
·All input are directly LVTTL compatible
·All output are three-state and directly LVTTL compatible
·Includes(0.22uF x 11) decoupling capacitors
·4096 refresh cycle every 64ms (A0~12)
·Hyper-page mode,Read-modify-write,
/CAS before /RAS refresh,Hidden refresh capabilities
·JEDEC standard pin configuration & Buffered PD pin
·Buffered input except /RAS and DQ
·Gold plating contact pads
MH8V725BAZTJ -6
PDF/DataSheet Download








