Purchase MICRF001, In-stock MICRF001 From SeekIC.
Part Number: MICRF001
Description: The MICRF001 is a single chip OOK (ON-OFF Keyed) Receiver IC for remote wireless applications, employing Micrel's lates...
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MICRF001
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General Description
MICRF001 General Description
The MICRF001 is a single chip OOK (ON-OFF Keyed) Receiver IC for remote wireless applications, employing Micrel's latest QwikRadiotm technology. This device is a true "antenna-in, dataout" monolithic device. All RF and IF tuning is accomplished automatically within the IC, which eliminates manual tuning, and reduces production costs. Receiver functions are completely integrated. The result is a highly reliable yet extremely low cost solution for high volume wireless applications. Because the MICRF001 is a true single-chip radio receiver, it is extremely easy to apply, minimizing design and production costs, and improving time to market.
The MICRF001 uses a novel architecture that allows the receiver to demodulate signals over a wide RF band, which eliminates the need for manual tuning. This also significantly relaxes the frequency accuracy and stability requirements of the Transmitter, allowing the MICRF001 to be compatible with both SAW-based and LC-based transmitters. The receiver sensitivity and selectivity are sufficient to provide low bit error rates for decode ranges over 100 meters, equaling the performance of other more expensive solutions.
All tuning and alignment are accomplished on-chip by a lowcost ceramic resonator or with an externally supplied clock reference. Initial tolerance requirements on the ceramic resonator or external clock is a modest ±0.5%. The MICRF001 performance is insensitive to data modulation duty cycle. The MICRF001 may be used with such coding schemes as Manchester or 33/66% PWM.
All post-detection (demodulator) data filtering is provided on the MICRF001, so no external filters need to be designed. Any one of four filter bandwidths may be selected externally by the user. Bandwidths range from 0.6kHz to 4.8kHz in binary steps
MICRF001 Maximum Ratings
Supply Voltage (VDDRF, VDDBB)........................................+7V
Voltage on any I/O Pin.............................VSS-0.3 to VDD+0.3
Junction Temperature.................................................+150°C
Storage Temperature Range......................-65°C to + 150°C
Lead Temperature (soldering, 10 seconds)...............+ 300°C
Voltage on any I/O Pin.............................VSS-0.3 to VDD+0.3
Junction Temperature.................................................+150°C
Storage Temperature Range......................-65°C to + 150°C
Lead Temperature (soldering, 10 seconds)...............+ 300°C
MICRF001 Features
· Complete UHF receiver on a monolithic chip
· Frequency range 300 to 440 MHz
· Typical range over 100 meters with monopole antenna
· Data rates to 4.8kbps
· Automatic tuning, no manual adjustment
· No Filters or Inductors required
· Very low RF re-radiation at the antenna
· Direct CMOS logic interface to standard decoder and microprocessor ICs
· Extremely low external part count
· Frequency range 300 to 440 MHz
· Typical range over 100 meters with monopole antenna
· Data rates to 4.8kbps
· Automatic tuning, no manual adjustment
· No Filters or Inductors required
· Very low RF re-radiation at the antenna
· Direct CMOS logic interface to standard decoder and microprocessor ICs
· Extremely low external part count
MICRF001 Typical Application
·Keyless Entry
·Security Systems
·Remote Fan/Light Control
·Garage Door Openers
·Security Systems
·Remote Fan/Light Control
·Garage Door Openers
MICRF001 Connection Diagram
| Pin Number | Pin Name | Pin Function |
|
1 |
SEL0 |
Programs desired Demodulator Filter Bandwidth. This pin in internally pulled-up to VDD. See Table 1. |
|
2/3 |
VSSRF |
This pin is the ground return for the RF section of the IC. The bypass capacitor connected from VDDRF to VSSRF should have the shortest possible lead length. For best performance, connect VSSRF to VSSBB at the power supply only (i.e., keep VSSBB currents from flowing through VSSRF return path). |
|
4 |
ANT |
This is the receive RF input, internally ac-coupled. Connect this pin to the receive antenna. Input impedance is high (FET gate) with approximately 2pF of shunt (parasitic) capacitance. For applications located in high ambient noise environments, a fixed value band-pass network may be connected between the ANT pin and VSSRF to provide additional receive selectivity and input overload protection. (See "Application Note 22, MICRF001 Theory of Operation".) |
|
5 |
VDDRF |
This pin is the positive supply input for the RF section of the IC. VDDBB and VDDRF should be connected directly at the IC pins. Connect a low ESL, low ESR decoupling capacitor from this pin to VSSRF, as short as possible. |
|
6 |
VDDBB |
This pin is the positive supply input for the baseband section of the IC. VDDBB and VDDRF should be connected directly at the IC pins. |
|
7 |
CTH |
This capacitor extracts the (DC) average value from the demodulated waveform, which becomes the reference for the internal data slicing comparator. Treat this as a low-pass RC filter with source impedance described in Table 1 . (See "Application Note 22, MICRF001 Theory of Operation", section 6.4). A standard ± 20% X7R ceramic capacitor is generally sufficient. |
|
8 |
DO |
Output data pin. CMOS level compatible. |
|
9/10 |
VSSBB |
This is the ground return for the baseband section of the IC. The bypass and output capacitors connected to VSSBB should have the shortest possible lead lengths. For best performance, connect VSSRF to VSSBB at the power supply only (i.e., keep VSSBB currents from flowing through VSSRF return path). |
|
8 |
N/C |
Unused Pin |
|
9 |
VSSBB |
This is the ground return for the baseband section of the IC. The bypass and output capacitors connected to VSSBB should have the shortest possible lead lengths. For best performance, connect VSSRF to VSSBB at the power supply only (i.e., keep VSSBB currents from flowing through VSSRF return path). |
|
11 |
CAGC |
The output data signal. CMOS level compatible. |
|
12 |
SEL1 |
Programs desired Demodulator Filter Bandwidth. This pin in internally pulled-up to VDD. See Table 1. |
|
13 |
REFOSC |
This is the timing reference for on-chip tuning and alignment. Either connect a ceramic resonator between this pin and VSSBB, or drive the input with an AC coupled 0.5Vpp input clock. Use ceramic resonators without integral capacitors. See "Application Note 22, MICRF001 Theory of Operation" for details on frequency selection and accuracy. |
|
14 |
SWEN |
This logic pin controls the operating mode of the MICRF001. When SWEN = HIGH, the MICRF001 is in SWP mode. This is the normal (default) mode of the device. When SWEN = LOW, the device operates as a conventional single-conversion superheterodyne receiver. (See "Application Note 22, MICRF001 Theory of Operation" for details.) This pin is internally pulled-up to VDD. |
MICRF001
PDF/DataSheet Download
- Datasheet: MICRF001
- File Size: 100034 KB
- Manufacturer: MICREL [Micrel Semiconductor]
- Click here to Download
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