ML87V2104

• Memory capacity : 4.4 Mbit (960 × 288 × 16 bits) × 1 unit
• Maximum input operating frequencies (16 bits/8 bits, ITU-R BT.656): 18/36 MHz (at 960 effective horizontal pixels)
• Maximum output operating frequencies (normal/flicker-free): 18/36 MHz (at 960 effective horizontal pixels)
• Power supply voltage : 3.3 V ± 0.3 V
• Input pin: TTL-5V tolerant (5 V withstand voltage)
• Input/output pins: Input TTL- output LVCMOS-5V tolerant (5 V withstand voltage)
• Output pin: LVCMOS (3.3 V)
• Input data format: YCbCr (8 bits (Y) + 8 bits (CbCr)) (4:2:2): Input 16-bit mode YCbCr (8 bits (YCbCr)) (4:2:2): Input 8-bit mode ITU-R656 (8 bits (YCbCr)): Input ITU-R BT.656 mode
• Output data format: YCbCr (8 bits (Y) + 8 bits (CbCr)) (4:2:2)
• Serial bus: I2C-bus interface: (400 kHz, 100 kHz)
• Memory controller functions: Input: Compliant to 525/60 Hz 2:1, 625/50 Hz 2:1 Output: 625/50 Hz 2:1, 525/60 Hz 2:1, 625/100 Hz 2:1, 525/120 Hz 2:1
• Sync generator functions: Can generate sync signals of 625/50 Hz 2:1, 525/60 Hz 2:1, 625/100 Hz 2:1, 525/120 Hz 2:1.
• Field-recursive type noise reduction function: Noise detection and noise subtraction type (with horizontal motion compensation) Auto mode noise reduction (noise is detected during vertical blanking period)
• Package: 100 pin QFP (QFP100-P-1420-0.65-BK4)

The ML87V2104 consists of a 3-port type (1 input port and 2 output ports) 4.4 Mbit (960 × 288 × 16bits) field memory and logic circuits for signal processing and memory control. The device can reduce field-recursive noise. Noise reduction auto mode can be set by detecting the noise in the vertical blanking period and by setting the noise reduction setting value according to the detected noise state. Moreover, an internal memory controller ML87V2104 controls flicker-free conversion that doubles the vertical and horizontal direction frequencies.