MM74C175

· Wide supply voltage range: 3V to 15V
· Guaranteed noise margin: 1.0V
· High noise immunity: 0.45 V_CC (typ.)
· Low power TTL compatibility: Fan out of 2 driving 74L

The MM74C175 consists of four positive-edge triggered Dtype flip-flops implemented with monolithic CMOS technology.

Both are true and complemented outputs from each flip-flop are externally available.

All four flip-flops MM74C175 are controlled by a common clock and a common clear. Informationat the D-type inputs meeting the set-up time requirements is  transferred to the Q outputs on the positive-going edge of the clock pulse. The clearing operation of MM74C175 , enabled by a negative pulse at Clear input, clears all four Q outputs to logical "0" and Q's to logical "1".