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MFG:NS  Package Cooled:DIP  

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Part Number: MM74C73N

 

MFG: NS

Package Cooled: DIP

 

Description: The MM74C73 and MM74C76 dual J-K flip-flops are monolithic complementary MOS (CMOS) integrated circuit...


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MM74C73N General Description


The MM74C73 and MM74C76 dual J-K flip-flops are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement transistors. Each flip-flop has independent J, K, clock and clear inputs and Q and Q outputs. The MM74C76 flip flops also include preset inputs and are supplied in 16 pin packages. This flip-flop is edge sensitive to the clock input and change state on the negative going transition of the clock pulse. Clear or preset is independent of the clock and is accomplished by a low level on the respective input.

MM74C73N Maximum Ratings

Voltage at Any Pin ...................−0.3V to VCC + 0.3V
Operating Temperature Range ....−55°C to +125°C
Storage Temperature ..................−65°C to +150°C
Power Dissipation
Dual-In-Line ...............................................700 mW
Small Outline ..............................................500 mW
Lead Temperature
(Soldering, 10 seconds) ................................260°C
Operating VCC Range........................... +3V to 15V
Note 2: "Absolute Maximum Ratings" are those values beyond which the
safety of the device cannot be guaranteed. Except for "Operating Temperature
Range" they are not meant to imply that the devices should be operated
at these limits. The table of Electrical Characteristics provides
conditions for actual device operation.

VCC (Max) 18V

MM74C73N Features

·  Supply voltage range: 3V to 15V
·  Tenth power TTL compatible: Drive 2 LPTTL loads
·  High noise immunity: 0.45 VCC (typ.)
·  Medium speed operation: 10 MHz (typ.)

MM74C73N Connection Diagram

MM74C73N  Connection Diagram

MM74C73N datasheet

MM74C73N
PDF/DataSheet Download

  • Datasheet: MM74C73N
  • File Size: 87447 KB
  • Manufacturer: FAIRCHILD [Fairchild Semiconductor]
  • Click here to Download

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