MMC4.2

The SD2.0/MMC4.2/CE-ATA storage solution has been developed in cooperation with ARASAN Chip Systems for Actel AGL600-FG256 lowpower IGLOO FPGA. The Actel IGLOO family of reprogrammable, fullfeatured flash FPGAs is designed to meet the demanding power and area requirements of today's portable electronics. Based on the Actel nonvolatile flash technology and single-chip ProASIC®3 FPGA architecture, the 1.2 V / 1.5 V operating voltage family offers the industry's lowest power consumption - as low as 5 W.

The storage daughter board interfaces with Marvell's PXA300/310 processor through the data flash interface (DFI). Arasan SD2.0/ MMC4.2/CE-ATA Host IP core in the Actel IGLOO device provides a low-cost and low-power solution. The Arasan SD2.0/MMC4.2/CE-ATA (CE-ATA 2) Host Controller core consists of the SD 2.0, SDIO 2.0, MMC4.2, and CE-ATA 1.1 controllers.

The Arasan CE-ATA 2 Host is fully compliant with the SD Host specification version 2.0 with Advanced-DMA support, MMC specification version 4.2, and CE-ATA Digital Protocol revision 1.1RC. It supports SPI, SD 1-bit, SD 4-bit, and MMC 8-bit modes. The CE-ATA 2 Host core is designed to support high-speed and full-speed SD data transfers. In application with an AHB interface, the Arasan CE-ATA 2 Host core communicates with the ARM® processor at a clock speed up to 300 MHz. The CE-ATA 2 Host controller includes a DMA controller and a FIFO that is expandable from a minimum size of 4 x 32-bit. An optional CPRM functional block can be incorporated to perform a Cipher algorithm for encryption and decryption.