MNADC12441CM-X

Supply Voltage (Vcc=DVcc=AVcc)...................................6.5V
Negative Supply Voltage (V-).......................................-6.5V
Voltage at Logic Control Input.............-0.3V to (Vcc + 0.3V)
Voltage at Analog Inputs
(Vin and Vref) ...............................(V- -0.3V) to (Vcc + 0.3V)
AVcc-DVcc
(Note 6).........................................................................0.3V
Input Current at Any Pin
(Note 3).......................................................................+5mA
Package Input Current
(Note 3).....................................................................+20mA
Power Dissipation at 25 C
(Note 4)....................................................................875mW
Maximum Junction Temperature..................................150 C
Storage Temperature Range.......................-65 C to +150 C
Thermal Resistance
ThetaJA
(Still Air) ...................................................................80 C/W
(500LF/Min Air flow) ......................................................TBD
ThetaJC .........................................................................TBD
ESD Susceptability
(Note 5).....................................................................2000V
Soldering Information
(10 sec.) ....................................................................300 C
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions.
Note 2: All voltages are measured with respect to Agnd and Dgnd, unless otherwise specified.
Note 3: When the input voltage (Vin) at any pin exceeds the power supply rails [Vin < V- or Vin >(AVcc or DVcc)], the current at that pin should be limited to 5mA. The 20mA maximum package input current ratings allows the voltage at any four pins, with an input current limit of 5mA, to simultaneously exceed the power supply voltages.
Note 4: The power dissipation of this device under normal operation should never exceed 169mW (Quiescent Power Dissipation + TTL Loads on the digital outputs). Caution should be taken not to exceed absolute maximum power rating when the device is operating in a severe fault condition (ex. when any inputs or outputs exceed the power supply). The maximum power dissipation must be derated at elevated temperatures and is dictated by Tjmax(maximum junction temperature), ThetaJA(package junction to ambient thermal resistance), and TA(ambient temperature). The maximum allowable power dissipation at any temperature is Pdmax = (Tjmax - TA)/ThetaJA or the number given in the Absolute Maximum Ratings, whichever is lower. for this device, Tjmax = 150 C.
Note 5: Human body model, 100pF discharged through a 1.5K Ohm resistor.
Note 6: A diode exists between AVcc and DVcc. To guarantee accuracy, it is required that the
AVcc and DVcc be connected together to a power supply with separate bypass filters at each Vcc pin.

The ADC12441 is a CMOS 12-bit plus sign successive approximation analog-to-digital converter whose dynamic specifications (S/N, THD, etc.) are tested and guaranteed. On request, the ADC12441 goes through a self-calibration cycle that adjusts positive linearity and full-scale errors to less than +1/2 LSB each and zero error to less than +1 LSB. The ADC12441 also has the ability to go through an Auto-Zero cycle that corrects the zero error during every conversion.

The analog input to the ADC12441 is tracked and held by the internal circuitry, and therefore does not require an external sample-and-hold. A unipolar analog input voltage range (0V to +5V) or a bipolar range (-5V to +5V) can be accommodated with +5V supplies. The 13-bit word on the outputs of the ADC12441 gives a 2's complement representation of negative numbers. The digital inputs and outputs are compatible with TTL or CMOS logic levels.