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Part Number: MPC9653
Description: The MPC9653 is a 3.3V compatible, 1:8 PLL based clock generator and zero-delay buffer targeted for hig...
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MPC9653
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DataSheet
General Description
MPC9653 General Description
The MPC9653 is a 3.3V compatible, 1:8 PLL based clock generator and zero-delay buffer targeted for high performance low-skew clock distribution in mid-range to high-performance telecom, networking and computing applications. With output frequencies up to 125 MHz and output skews less than 150 ps the device meets the needs of the most demanding clock applications.
MPC9653 Maximum Ratings
| Symbol | Characteristics | Min | Max | Unit | Condition |
| VCC | Supply Voltage | -0.3 | 3.9 | V | |
| VIN | DC Input Voltage | -0.3 | VCC+0.3 | V | |
| VOUT | DC Output Voltage | -0.3 | VCC+0.3 | V | |
| IIN | DC Input Current | ±20 | mA | ||
| IOUT | DC Output Current | ±50 | mA | ||
| TS | Storage Temperature | -65 | 125 |
MPC9653 Features
• 1:8 PLL based low-voltage clock generator
• Supports zero-delay operation
• 3.3V power supply
• Generates clock signals up to 125 MHz
• Maximum output skew of 150 ps
• Differential LVPECL reference clock input
• External PLL feedback
• Drives up to 16 clock lines
• 32 lead LQFP packaging
• Ambient temperature range 0to +70
• Pin and function compatible to the MPC953
• Supports zero-delay operation
• 3.3V power supply
• Generates clock signals up to 125 MHz
• Maximum output skew of 150 ps
• Differential LVPECL reference clock input
• External PLL feedback
• Drives up to 16 clock lines
• 32 lead LQFP packaging
• Ambient temperature range 0to +70
• Pin and function compatible to the MPC953
MPC9653 Typical Application
·The MPC9653 supports output clock frequencies from 25 to 125 MHz. Two different feedback divider configurations can be used to achieve the desired frequency operation range. The feedback divider (VCO_SEL) should be used to situate the VCO in the frequency lock range between 200 and 500 MHz for stable and optimal operation. Two operating frequency ranges are supported: 25 to 62.5 MHz and 50 to 125 MHz. Table 9 illustrates the configurations supported by the MPC9653. PLL zero-delay is supported if BYPASS=1, PLL_EN=1 and the input frequency is within the specified PLL reference frequency range.
MPC9653 Connection Diagram
MPC9653
PDF/DataSheet Download
- Datasheet: MPC9653
- File Size: 299950 KB
- Manufacturer: MOTOROLA [Motorola, Inc]
- Click here to Download
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