The MPIB63S-68KX3 is 32M bit x 72 Synchronous Dynamic RAM high density memory module. The MPIB63S-68KX3 consists of eighteen CMOS 16M x 8 bit with 4 banks Synchronous DRAMs in TinyBGA package, three 18-bits Drive ICs for input control signal, one PLL in 24-pin TSSOP package for clock and one 2K EEPROM in 8-pin TSSOP package for Serial Presence Detect on a 168-pin glassepoxy substrate. Two 0.1uF decoupling capacitors are mounted on the printed circuit board in parallel for each SDRAM.
The MPIB63S-68KX3 is a Dual in-line Memory Module and is intended for mounting into 168-pin edge connector sockets.
Synchronous design allows precise cycle control with the use of system clock. I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable latencies allows the same device to be useful for a variety of high bandwidth, high performance memory system application.
| PARAMETER | SYMBOL | RATING | Unit |
| Voltage on any pin relative to VSS Voltage on VDD supply relative to VSS Storage temperature Power dissipation Short circuit current |
VIN, VOUT VDD, VDDQ TSTG PD IOS |
-1.0 ~ 4.6 -1.0 ~ 4.6 -55 ~ +125 18 50 |
V V °C W mA |
· Performance range – 133Mhz Max. Freq. (CL=3)
· Burst mode operation
· Auto & self-refresh capability (4096 Cycles/64ms)
· LVTTL compatible inputs and outputs
· Single 3.3V±0.3V power supply
· MRS cycle with address key programs
· Latency (Access from column address)
· Burst Length (1, 2, 4, 8 & Full page)
· Data scramble (Sequential & Interleave)
· All inputs are sampled at the positive going edge of the system clock
· Serial presence detect with EEPROM
· PCB: Height (1200 mil), double sided component
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MPIC2111