MPMB62D-68KX3

Note: Permanent device damage may occur if "ABSOLUTE MAXIMUM RANTINGS" are exceeded. Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time affect device reliability.

The MPMB62D-68KX3 is 32M bit x 64 Double Data Rate Synchronous Dynamic RAM high density memory module based on 128Mb DDR SDRAM respectively.

The MPMB62D-68KX3 consists of sixteen CMOS 16M ´ 8 bit with 4 banks Double Data Rate Synchronous DRAMs in TinyBGA package and a 2K EEPROM in 8-Pin TSSOP package mounted on a 184pin glass-epoxy substrate. Two 0.1F decoupling capacitors are mounted on the printed circuit board in parallel for each DDR SDRAM.

The MPMB62D-68KX3 is a Dual In-line Memory Module and is intended for mounting into 184pin edge connector sockets.

Synchronous design of MPMB62D-68KX3 allows precise cycle control with the use of system clock. Data I/O transactions are possible on both edges of every clock cycle. Range of operating frequencies, programmable latencies and burst lengths allows the same device to be useful for a variety of high bandwidth, high performance memory system applications.