MSP50C601

The MSP50C601 is a low-cost, mixed-signal processor that combines a speech synthesizer, general-purpose
I/O, onboard ROM, and direct speaker drive in a single package. The computational unit utilizes a powerful new
DSP which gives the MSP50C601 unprecedented speed and computational flexibility compared with previous
devices of its type. The MSP50C601 supports a variety of speech and audio coding algorithms, providing a
range of options for speech duration and sound quality.

The MSP50C601 consists of a micro-DSP core, embedded program, and data memory, and a self-contained clock
generation system. General-purpose periphery is comprised of 32 bits of partially configurable I/O.
The core processor is a general-purpose 16-bit microcontroller with DSP capability. The basic core block
of MSP50C601 includes computational unit (CU), data address unit, program address unit, two timers, eight level interrupt
processor, and several system and control registers. The core processor gives the MSP50C601 break-point
capability in emulation.

The processor MSP50C601 is Harvard type for efficient DSP algorithm execution. It requires separate program and data
memory blocks to permit simultaneous access. The ROM has a protection scheme to prevent third-party
pirating. MSP50C601 is configured in 32K 17-bit words.

The total ROM space of MSP50C601 is divided into three areas: 1) The lower 2K words are reserved by Texas Instruments for
a built-in self-test 2) The upper 30K words are for user program/data 3) An additional 1 Mb data ROM provides
for up to 24 minutes of speech.

The data memory of MSP50C601 is internal static RAM. The RAM is configured in 640 17-bit words. All memories are designed
to consume minimum power at a given system clock and algorithm acquisition frequency.