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MFG:SOP  Package Cooled:MICRON  D/C:06+  

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Part Number: MT28F400B5

 

MFG: SOP

Package Cooled: MICRON

D/C: 06+

Description: The MT28F642D20 and MT28F642D18 are highperformance, high-density, nonvolatile memory solutions that...


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MT28F400B5 General Description


The MT28F642D20 and MT28F642D18 are highperformance, high-density, nonvolatile memory solutions that can significantly improve system performance. This new architecture features a twomemory- bank configuration that supports dual-bank operation with no latency.

A high-performance bus interface allows a fast burst or page mode data transfer; a conventional asynchronous bus interface is provided as well.

The devices allow soft protection for blocks, as readonly, by configuring soft protection registers with dedicated command sequences. For security purposes, two 64-bit chip protection registers are provided.

The embedded WORD WRITE and BLOCK ERASE functions are fully automated by an on-chip write state machine (WSM). Two on-chip status registers, one for each of the two memory partitions, can be used to monitor the WSM status and to determine the progress of the program/erase task.

The erase/program suspend functionality allows compatibility with existing EEPROM emulation software packages.

These devices are manufactured using 0.18m process technology.

MT28F400B5 Maximum Ratings

Voltage on VCC Supply
Relative to VSS ....................................-0.5V to +6V**
Input Voltage Relative to VSS ..............-0.5V to +6V**
VPP Voltage Relative to VSS ..............-0.5V to +12.6V†
RP# or A9 Pin Voltage
Relative to VSS ................................. -0.5V to +12.6V†
Temperature Under Bias ...................-40°C to +85°C
Storage Temperature (plastic) ........-55°C to +125°C
Power Dissipation ...................................................1W

MT28F400B5 Features

• Seven erase blocks:
16KB/8K-word boot block (protected)
Two 8KB/4K-word parameter blocks
Four main memory blocks
• Smart 5 technology (B5):
5V ±10% VCC
5V ±10% VPP application/production
programming
12V ±5% VPP compatibility production
programming
• Address access times: 60ns, 80ns
• 100,000 ERASE cycles
• Industry-standard pinouts
• Inputs and outputs are fully TTL-compatible
• Automated write and erase algorithm
• Two-cycle WRITE/ERASE sequence
• Byte- or word-wide READ and WRITE
(MT28F400B5, 256K x 16/512K x 8)
• Byte-wide READ and WRITE only
(MT28F004B5, 512K x 8)
• TSOP and SOP packaging options

MT28F400B5 Connection Diagram

MT28F400B5  Connection DiagramMT28F400B5  Connection Diagram

MT28F400B5 datasheet

MT28F400B5
PDF/DataSheet Download

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