MT28F800B5 General Description
MT28F800B5 Maximum Ratings
MT28F800B5 Features
• Eleven erase blocks:
16KB/8K-word boot block (protected)
Two 8KB/4K-word parameter blocks
• Eight main memory blocks
• Smart 5 technology (B5):
5V ±10% VCC
5V ±10% VPP application/
production programming1
• Advanced 0.18µm CMOS floating-gate process
• Compatible with 0.3µm Smart 5 device
• Address access time: 80ns
• 100,000 ERASE cycles
• Industry-standard pinouts
• Automated write and erase algorithm
• Two-cycle WRITE/ERASE sequence
• TSOP and SOP packaging options
• Byte- or word-wide READ and WRITE
(MT28F800B5, 1 Meg x 8/512K x 16)
MT28F800B5 Connection Diagram
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