MTC20154

Features:

·Fully integrated AFE for ADSL
·Overall 12 bit resolution, 1.1MHz signal bandwidth
·8.8 MS/s ADC
·8.8 MS/s DAC
·THD: -60 dB @ full scale
·1V full scale input
·Differential analog I/O
·Accurate continuous-time channel filtering
·3^rd & 4^th order tunable continuous time LP Filters
·64 pin TQFP package
·350mW power consumption


Application

·ADSL Front-end for all full rate and Lite standards


Pinout




Specifications

Operation of the device beyond these limits may cause permanent damage. It is not implied that more than
one of these conditions can be applied simultaneously.

Symbol	Parameter	Min.	Typ.	Max.	Unit
VDD	Any VDD supply voltage, related to substrate	-0,5		5	Vhh
Vin	Voltage at any input pin	-0,5		VDD +0.5	V
Tstg	Storage Temperature	-40		125
TL	Lead Temperature (10 second soldering)			300
Pd	Power Dissipation	350	350	500	mW
Tj	Junction Temperature	-40		110

Operating Conditions
Unless specified, the characteristic limits of 'Static characteristics' in this document apply for the following
operating conditions:

Symbol	Parameter	Min.	Max.	Unit
AVDD	AVDD supply voltages, related to substrate	3.0	3.6	V
DVDD	DVDD supply voltages, related to substrate	2.7	3.6	V
Vin, Vout	Voltage at any input and output pin	0	VDD	V
Tamb	Ambient Temperature - I version	-40	85
Tamb	Ambient Temperature - C version	0	70

Static Characteristics
Digital Inputs
Schmitt-trigger inputs: TXi, CTRLIN, PDOWN, LTNT, RESETN, TEST

Symbol	Parameter	Min.	Max.	Unit
VIL	Low level input voltage		0.2*DVD	V
VIH	High level input voltage	0.8*DVDD		V
VH	Hysteresis	1.0	1.3	V
Cinp	Input capacitance		3	pF

Digital Outputs
Hard driven outputs: RXi, CLKWD, GPI, DRVI, DRVSD

Symbol	Parameter	Test Condition	Min.	Max.	Unit
VOL	Low level output voltage	Iout = -4 mA		.15*DVDD	V
VOH	High level output voltage	Iout = 4mA	.85*DVDD		V
Cload	Load capacitance			30	pF

Clock Driver output: CLKM

Symbol	Parameter	Test Condition	Min.	Max.	Unit
VOL	Low level output voltage	Iout = -4 mA		.15*DVDD	V
VOH	High level output voltage	Iout = 4mA	.85*DVDD		V
Cload	Load capacitance			30	pF
Dcycle	Duty cycle		45	55	%

 

Description

The MTC20154 is the fifth generation Analog Front End (AFE) designed for DMT based ADSL (Asynchronous Digital Subscriber Line) modems compliant with ANSI T1.413 category 2 standard. It includes one 12 bit DAC and one 13 bit ADC.It isintended to be used with the MTC20156/ MTC20147 DMT/ATM processors as part of the MTK20150/MTK20141 chipsets, but may also be used to support other xDSL signal processors.

The MTC20154 provides programmable low pass filters for each of the two channels and automatic gain control. A configuration pin allows the filters to be switched from ATU-R mode to ATU-C mode. The pipeline ADC architecture provides 13 bit dynamic range and a signal bandwith of 1.1 MHz. The device consumes only 0.35 Watt in full operation and has a power down mode for standby. It is housed in a compact 64 pin thin plastic quad flat package.