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Part Number: MTV112M
Description: The MTV112M micro-controller is an 8051 CPU core embedded device specially tailored to CRT monitor app...
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MTV112M
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DataSheet
General Description
MTV112M General Description
The MTV112M micro-controller is an 8051 CPU core embedded device specially tailored to CRT monitor applications. It includes an 8051 CPU core, 384-byte SRAM, 14 built-in PWM DACs, DDC1/DDC2B interface, 24Cxx series EEPROM interface, A/D converter and a 32K bytes internal program Flash ROM.
MTV112M Maximum Ratings
at: Ta= 0 to 70 , VSS=0V
|
Name |
Symbol |
Range |
Unit |
| Maximum Supply Voltage Maximum Input Voltage Maximum Output Voltage Maximum Operating Temperature Maximum Storage Temperature |
VDD Vin Vout Topg Tstg |
-0.3 to +6.0 0.3 to VDD+0.3 0.3 to VDD+0.3 0 to +70 -25 to +125 |
V V V |
MTV112M Features
·8051 core.
·384-bytes internal RAM.
·32K-bytes program Flash ROM.
·14-channels 5V open-drain PWM DAC, 10 dedicated channels and 4 channels shared with I/O pin.
·28 bi-direction I/O pin,12 dedicated pin,12 shared with DAC, 4 shared with DDC/IIC interface.
·3-output pin shared with H/V sync output and self test output pins.
·SYNC processor for composite separation, polarity and frequency check, and polarity adjustment.
·Built-in monitor self-test pattern generator.
·Built-in low power reset circuit.
·One slave mode IIC interface and one master mode IIC interface.
·IIC interface for DDC1/DDC2B and EEPROM, only one EEPROM needed to store DDC1/DDC2B and display mode information.
·Dual 4-bit ADC or 4 channel 6-bit ADC.
·Watchdog timer with programmable interval.
·40-pin PDIP and 44-pin PLCC package.
·384-bytes internal RAM.
·32K-bytes program Flash ROM.
·14-channels 5V open-drain PWM DAC, 10 dedicated channels and 4 channels shared with I/O pin.
·28 bi-direction I/O pin,12 dedicated pin,12 shared with DAC, 4 shared with DDC/IIC interface.
·3-output pin shared with H/V sync output and self test output pins.
·SYNC processor for composite separation, polarity and frequency check, and polarity adjustment.
·Built-in monitor self-test pattern generator.
·Built-in low power reset circuit.
·One slave mode IIC interface and one master mode IIC interface.
·IIC interface for DDC1/DDC2B and EEPROM, only one EEPROM needed to store DDC1/DDC2B and display mode information.
·Dual 4-bit ADC or 4 channel 6-bit ADC.
·Watchdog timer with programmable interval.
·40-pin PDIP and 44-pin PLCC package.
MTV112M Connection Diagram
MTV112M
PDF/DataSheet Download
- Datasheet: MTV112M
- File Size: 164664 KB
- Manufacturer: ETC [ETC]
- Click here to Download
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