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Part Number: MX25L4004

 

 

 

 

Description: The MX25L4004 is a CMOS 4,390,912 bit serial Flash EEPROM, which is configured as 548,864 x 8 internal...


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MX25L4004 General Description


The MX25L4004 is a CMOS 4,390,912 bit serial Flash EEPROM, which is configured as 548,864 x 8 internally.The MX25L4004 features a serial peripheral interface and software protocal allowing operation on a simple 3- wire bus. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO). SPI access to the device is enabled by CS input.

The MX25L4004 features sector protected and unprotected modes, which disable/enable both program and erase operation in the top four sectors.

After program/erase command is issued, auto program/erase algorithms which program/erase and verify the specified sector/page locations will be executed. Program command is executed on a page (134 bytes) basis,and erase command is executed on a sector (536 bytes) basis.

To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read command can be issued to detect completion and error flag status of a program or erase operation.

When the device is not in operation and CS is high, it is put in standby mode and draws less than 30uA DC current.To save power further, the device may be put into sleep mode. During sleep mode, the device only draws 1uA DC current. Recovery time from sleep mode is less than 25us.

The MX25L4004 utilizes MXIC's proprietary memory cell which reliably stores memory contents even after 10,000 program and erase cycles.

MX25L4004 Maximum Ratings

RATING

VALUE

Ambient Operating Temperature -10°C to 85°C
Storage Temperature

-65°C to 125°C

Applied Input Voltage

-0.5V to 3.8V

Applied Output Voltage -0.5V to 3.8V
VCC to Ground Potential -0.5V to 3.8V

NOTICE:
1.Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is stress rating only and functional operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended period may affect reliability.
2.Specifications contained within the following tables are subject to change.

MX25L4004 Features

• Low voltage operation: 2.7V ~ 3.6V
• SPI Bus compatible
• Sector erase architecture:
- 1024 equal sectors of 536 bytes each
- Sector erase time: 8ms typical
• Page program operation:
- Internal data latches for 134 bytes per page
- Page programming time: 3ms typical
• Auto Erase and Auto Program algorithms:
- Automatically erases and verifies data at selected sector
- Automatically programs and verifies data at selected page
• Four independently protected sectors on the top for boot code storage
• Status register feature for detection of
- Program or erase cycle completion
- Array to Buffer transfer
- Sleep
- Auto Program/Erase error report
• Six extra bytes on each page for user page management
• Dual buffers for buffer write when chip is busy
• Input data format:
- 1-byte OP code, 2-byte sector address, 1-byte page number, 1-byte byte address
• 32-pin TSOP TYPE(I)

MX25L4004 Connection Diagram

MX25L4004  Connection Diagram

MX25L4004 datasheet

MX25L4004
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