DescriptionThe N04M1618L1A is an integrated memory device intended for non life-support (Class 1 or 2) medical applications. This N04M1618L1A is a 4 megabit memory organized as 262,144 words by 16 bits. The N04M1618L1A is designed and fabricated using NanoAmp's advanced CMOS technology with reliab...
N04M1618L1A: DescriptionThe N04M1618L1A is an integrated memory device intended for non life-support (Class 1 or 2) medical applications. This N04M1618L1A is a 4 megabit memory organized as 262,144 words by 16 b...
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The N04M1618L1A is an integrated memory device intended for non life-support (Class 1 or 2) medical applications. This N04M1618L1A is a 4 megabit memory organized as 262,144 words by 16 bits. The N04M1618L1A is designed and fabricated using NanoAmp's advanced CMOS technology with reliability inhancements for medical users. The base design is the same as NanoAmp's N04M1618L2A, which has further reliability processing for life-support (Class 3) medical applications. The device operates with two chip enable (CE1 and CE2) controls and output enable (OE) to allow for easy memory expansion.
The N04M1618L1A has the following features including:(1)dual power supply for lowest power; (2)very low standby current; (3)very low operating current; (4)low page mode operating current; (5)simple memory control; (6)low voltage data retention; (7)automatic power down to standby mode; (8)special processing to reduce soft error rate(SER); (9)space saving bga package available.
The absolute maximum ratings of the N04M1618L1A are:(1)voltage on any pin relative to Vss:-0.3 to Vcc+0.3V; (2)voltage on VCC supply relative to Vss:-0.3 to 4.5V; (3)operating temperature:-40 to 85; (4)storage temperature:-40 to 125;(5)power dissipation:500mW.Stresses greater than those listed above may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.The only thing that needs to be done is to address the SRAM in a manner that the internal page is left open and 8-bit words of data are read from the open page. By treating addresses A0-A3 as the least significant bits and addressing the 16 words within the open page, power is reduced to the page mode value which is considerably lower than standard operating currents for low power SRAMs.