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NM24W16

Features: ` Hardware Write Protect for entire memory` Low Power CMOS`200mA active current typical`10mA standby current typical`1mA standby typical (L)`0.1mA standby typical (LZ)` IIC Compatible interface - Provides bidirectional data transfer protocol` Sixteen byte page write mode - Minimizes tota...

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SeekIC No. : 004434845 Detail

NM24W16: Features: ` Hardware Write Protect for entire memory` Low Power CMOS`200mA active current typical`10mA standby current typical`1mA standby typical (L)`0.1mA standby typical (LZ)` IIC Compatible inte...

NM24W16 Data Sheet

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Part Number:
NM24W16
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

` Hardware Write Protect for entire memory
` Low Power CMOS
`200mA active current typical
`10mA standby current typical
`1mA standby typical (L)
`0.1mA standby typical (LZ)
` IIC Compatible interface
    - Provides bidirectional data transfer protocol
` Sixteen byte page write mode
     - Minimizes total write time per byte
` Self timed write cycle
    - Typical write cycle time of 6ms
` Endurance: 1,000,000 data changes
` Data retention greater than 40 years
` Packages available: 8-pin DIP, 8-pin SO, and 8-pin TSSOP
` Available in three temperature ranges
   - Commercial: 0° to +70°C
   - Extended (E): -40° to +85C
   - Automotive (V): -40° to +125°C


Pinout

Connection Diagram


Specifications

Ambient Storage Temperature  . . . . 65°C to +150°C
All Input or Output Voltages
with Respect to Ground  . . . . . . . . . . . . . .6.5V to 0.3V
Lead Temperature
(Soldering, 10 seconds)  . . . . . . . . . . . . . . . . . .+300°C
ESD Rating  . . . . . . . . . . . . . . . . . . . . . . . . . . 2000V min.


Description

The NM24Wxx devices are 2048/4096/8192/16,384 bits, respectively, of CMOS non-volatile electrically erasable memory. NM24W16 conform to all specifications in the IIC 2-wire protocol and are designed to minimize device pin count, and simplify PC board layout requirements.

The entire ememory of NM24W16 can be disabled (Write Protected) by connecting the WP pin to VCC. The memory then becomes unalterable unless WP is switched to VSS.

This communications protocol of NM24W16 uses CLOCK (SCL) and DATA I/O (SDA) lines to synchronously clock data between the master (for example a microprocessor) and the slave EEPROM device(s). The Standard IIC protocol of NM24W16 allows for a maximum of 16K of EEPROM memory which is supported by Fairchild's family in 2K, 4K, 8K, and 16K devices, allowing the user to configure the memory as the application requires with any combination of EEPROMs.

Fairchild EEPROMs are designed and tested for applications requiring high endurance, high reliability and low power consumption.




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