Position: Home  > All Categories> Integrated Circuits (ICs) > OR3T55-7

OR3T55-7

Features: `UTOPIA Level 1/Level 2 with parity generation/ checking. In Level 2, all multi-PHY modes are supported: - 1 RxClav/1 TxClav - Direct status - Multiplexed status polling`8-/16-bit bus width`Programmable cell length`25/33/50 MHz operation`Meets all UTOPIA setup and clock-to-output specifi...

product image

OR3T55-7 Picture
See larger image
SeekIC No. : 004438645 Detail

OR3T55-7: Features: `UTOPIA Level 1/Level 2 with parity generation/ checking. In Level 2, all multi-PHY modes are supported: - 1 RxClav/1 TxClav - Direct status - Multiplexed status polling`8-/16-bit bus widt...

OR3T55-7 Data Sheet

floor Price/Ceiling Price

Get Latest Price
Part Number:
OR3T55-7
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

SeekIC Buyer Protection PLUS - newly updated for 2013!

  • Escrow Protection.
  • Guaranteed refunds.
  • Secure payments.
  • Learn more >>

Month Sales

268 Transactions

Rating

evaluate  (4.8 stars)

Upload time: 2024/4/27

add to my favourite

Payment Methods

All payment methods are secure and covered by SeekIC Buyer Protection PLUS.

Notice: When you place an order, your payment is made to SeekIC and not to your seller. SeekIC only pays the seller after confirming you have received your order. We will also never share your payment details with your seller.
Product Details

Description



Features:

`UTOPIA Level 1/Level 2 with parity generation/ checking. In Level 2, all multi-PHY modes are supported:
  - 1 RxClav/1 TxClav
  - Direct status
  - Multiplexed status polling
`8-/16-bit bus width
`Programmable cell length
`25/33/50 MHz operation
`Meets all UTOPIA setup and clock-to-output specifications
`FIFO control/monitoring with the following options:
  - Internal 128* 9/64 *17 ORCA® FIFOs (scalable)
`Flexible control inputs with options for the following:
  - Internal/external hardwiring
  - Access via a parallel or serial microprocessor interface
`Supports the ORCA Series 2 and Series 3 families of FPGAs
`VHDL* source code for easy design integration
`ORCA-specific optimization, tailor-made for high performance
`Ample design flexibility using built-in interface and function options
`Verified functionality and standards compliance


Application

·ORCA ATM Physical Layer CSC Application Note (AP97-050FPGA available from Lucent Technologies)
·ORCA OR2CxxA and OR2TxxA Series Field Programmable Gate Arrays Data Sheet (DS98-022), January 1998
·ORCA OR3CxxA and OR3TxxA Series Field Programmable Gate Arrays Data Sheet (DS98-163-1), August 1998
·Asynchronous Transfer Mode: ATM Architecture and Implementation, Martin et al., Prentice Hall 1996


Description

The ATM UTOPIA Slave Core OR3T55-7 from Modelware† implements, in modular VHDL, the ATM forum's UTOPIA Level 1 and Level 2 specifications.

The core interfaces of OR3T55-7 to the application (e.g., ATM physical or adaptation layer) via a generic FIFO-like access interface and to the ATM layer via a UTOPIA Level 1 or Level 2 interface (Figure 1). The core uses internal FIFOs for cell buffering and timing transfer between the application and the ATM layer.

The core (using 18-bit internal FIFOs) operates at 50 MHz in an OR2T15A-6 or an OR3T55-7 ORCA FPGA.




Customers Who Bought This Item Also Bought

Margin,quality,low-cost products with low minimum orders. Secure your online payments with SeekIC Buyer Protection.
You may also be interested in :
Circuit Protection
A50QS75-4Y
F-17*77
Audio Products
HUC1002
WM-64CT
Soldering, Desoldering, Rework Products
TGK-900M-B
TGK-900M-1.6D
Test Equipment
TOP853
TOP2005
Kits
IT243
UVSC-110-4E1
Inductors, Coils, Chokes
DR127-330-R
SD53-100-R
View more