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Part Number: P4C187L

 

 

 

 

Description: The P4C187/L are 65, 536-bit ultra high speed static RAMs organized as 64K x 1. The CMOS memories requ...


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P4C187L General Description


The P4C187/L are 65, 536-bit ultra high speed static RAMs organized as 64K x 1. The CMOS memories require no clocks or refreshing and have equal access and cycle times. The RAMs operate from a single 5V ± 10% tolerance power supply. Data integrity is maintained for supply voltages down to 2.0V, typically drawing 10mA.

Access times as fast as 10 nanoseconds are available, greatly enhancing system speeds. CMOS reduces power consumption to a low 743mW active, 193/83mW standby for TTL/CMOS inputs and only 5.5 mW standby for the P4C187L.

The P4C187/L are available in 22-pin 300 mil DIP, 24-pin 300 mil SOJ, and 22-pin LCC packages providing excellent board level densities.

P4C187L Maximum Ratings

Symbol
Parameter
Value
Unit
VCC
Power Supply Pin with Respect to GND
0.5 to +7
V
VTERM
Terminal Voltage with Respect to GND (up to 7.0V)
0.5 to VCC +0.5
V
TA
Operating Temperature
55 to +125
°C
TBIAS
Temperature Under Bias
55 to +125
°C
TSTG
Storage Temperature
65 to +150
°C
PT
Power Dissipation
1.0
W
IOUT
DC Output Current
50
mA

P4C187L Features

`Full CMOS, 6T Cell
`High Speed (Equal Access and Cycle Times)
   10/12/15/20/25 ns (Commercial)
   12/15/20/25/35 ns (Industrial)
   15/20/25/35/45 ns (Military)
`Low Power Operation
   743 mW Active -10
   660/770 mW Active for -12/15
   550/660 mW Active for -20/25 /35
   193/220 mW Standby (TTL Input)
   83/110 mW Standby (CMOS Input) P4C187
   5.5 mW Standby (CMOS Input) P4C187L (Military)
`Single 5V±10% Power Supply
`Data Retention with 2.0V Supply (P4C187L Military)
`Separate Data I/O
`Three-State Output
`TTL Compatible Output
`Fully TTL Compatible Inputs
`Standard Pinout (JEDEC Approved)
   22-Pin 300 mil DIP
   24-Pin 300 mil SOJ
   22-Pin 290x490 mil LCC

P4C187L Connection Diagram

P4C187L  Connection Diagram

P4C187L datasheet

P4C187L
PDF/DataSheet Download

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