PA40

Features: • MONOLITHIC MOS TECHNOLOGY• LOW COST• HIGH VOLTAGE OPERATION-250V• LOW QUIESCENT CURRENT-2mA• NO SECOND BREAKDOWN• HIGH OUTPUT CURRENT-120 mA PEAKApplication• TELEPHONE RING GENERATOR• PIEZO ELECTRIC POSITIONING• ELECTROSTATIC TRANSD...

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PA40 Picture
SeekIC No. : 004453866 Detail

PA40: Features: • MONOLITHIC MOS TECHNOLOGY• LOW COST• HIGH VOLTAGE OPERATION-250V• LOW QUIESCENT CURRENT-2mA• NO SECOND BREAKDOWN• HIGH OUTPUT CURRENT-120 mA PEAKAppli...

floor Price/Ceiling Price

Part Number:
PA40
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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268 Transactions

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Upload time: 2024/3/27

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Product Details

Description



Features:

• MONOLITHIC MOS TECHNOLOGY
• LOW COST
• HIGH VOLTAGE OPERATION-250V
• LOW QUIESCENT CURRENT-2mA
• NO SECOND BREAKDOWN
• HIGH OUTPUT CURRENT-120 mA PEAK



Application

• TELEPHONE RING GENERATOR
• PIEZO ELECTRIC POSITIONING
• ELECTROSTATIC TRANSDUCER & DEFLECTION
• DEFORMABLE MIRROR FOCUSING



Specifications

SUPPLY VOLTAGE, +VS to VS 250V
OUTPUT CURRENT, continuous within SOA 60mA
POWER DISSIPATION, continuous @ TC = 25 120mW
INPUT VOLTAGE, differential 14W
INPUT VOLTAGE, common mode ±16V
TEMPERATURE, pin solder 10 sec ±V
TEMPERATURE, junction2 220
TEMPERATURE, storage 150
TEMPERATURE RANGE, powered (case) 65 to 150
40 to 125




Description

The PA40 is a high voltage monolithic MOSFET operational amplifi er achieving performance features previously found only in hybrid designs while increasing reliability. Inputs are protected from excessive common mode and differential mode voltages. The safe operating area (SOA) PA40 has no second breakdown limitations. External compensation provides the user fl exibility in choosing optimum gain and bandwidth for the application.

The PA40 is packaged in Apex's 7 LEAD TO220 package. The metal back of the package is tied to Vs. The 15 mil minimum spacing of the TO220 package of PA40 is adequate to stand-off the 250V rating of the PA40. The user must insure that a minimum of 11 mils spacing is maintained between pins for the circuit board artwork. If spacing is less than 11 mils, the voltage must be derated.




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