PEF2045-P

The PEx 2045 is a memory time switch device. It can connect any of 512 PCM input channels to any of 256 output channels.

The input information of a complete frame is stored in the on-chip 4-Kbit speech memory SM (see figure 8). The incoming 512 channels of 8 bits each are written in sequence into fixed positions in the SM. This is controlled by the input counter in the timing control block with a 8-kHz repetition rate.

For outputting, the connection memory (CM) is read in sequence. Each location in CM points to a location in the speech memory. The byte in this speech memory location is read into the current output time-slot. The read access of the CM is controlled by the output counter which also resides in the timing control block.

Hence the CM needs to be programmed beforehand for the desired connection. The CM address corresponds to one particular output time-slot and line number. The contents of this CM-address points to a particular input time-slot and line number (now resident in the SM).

The PEx 2045 works in standard configuration for usual switching applications, and in the primary access configuration where it realizes, together with the PEB 2035 (ACFA) and the PEB 2235 (IPAT), the system interface for up to four primary multiplex access lines.

In the following chapters the functions of the PEx 2045 will be covered in more detail.