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Part Number: PM5945
Description: The PM5945 SAPI daughter board contains the PMC PM5345 SUNI-155 (SATURN User Network Interface), the C...


Description: The PM5945 SAPI daughter board contains the PMC PM5345 SUNI-155 (SATURN User Network Interface), the C...
The PM5945 SAPI daughter board contains the PMC PM5345 SUNI-155 (SATURN User Network Interface), the Cypress CY7B951 SONET/SDH Serial Transceiver (a clock and data recovery and clock synthesis unit), and optical PMD in a complete optical ATM (Asynchronous Transfer Mode) physical interface. The SUNI is an ATM physical layer processor for a SONET STS-3C transmission system. This daughter board has been designed to mate with National Semiconductor Corporation's Vicksburg EISA adapter motherboard to form a complete evaluation system. The SAPI daughter board is configured, monitored, and powered through a 100 pin edge connector that mates with the Vicksburg motherboard. The motherboard provides all of the software and decoding logic necessary to directly access all of the registers on the SAPI board.
The SAPI line side interface uses any 9-pin duplex SC receptacle. The optical Transceiver PMD device runs at 155.52 MHz. On the receive side, the receive optical PMD connects to the clock and data recovery section of the Cypress SONET/SDH Serial Transceiver (CY7B951). The output of the CY7B951 is accoupled to the SUNI's bit serial input. On the transmit side, the SUNI's PECL data outputs connect directly to the Cypress CY7B951 serial input which buffers the data and outputs the data directly to the transmit optics. The CY7B951 can mux the output data to the input of the PLL and transfer back the recovered clock and data to the input of the SUNI for diagnostic purposes.
The SAPI drop side interface uses a 100 pin edge connector. The 22V10 PLDs transform the SUNI drop side signals to comply with the UTOPIA like signals of the Vicksburg motherboard. The receive drop side also incorporates an additional FIFO, as the internal 4 cell FIFO of the SUNI device is insufficient to handle the latency time between burst cell reads by the R-FRED device on the Vicksburg motherboard.
PM5945
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