REJ09B0311

Features: • Two interrupt control modes Any of two interrupt control modes can be set by means of bits INTM1 and INTM0 in the interrupt control register (INTCR).• Priority can be assigned by the interrupt priority register (IPR) IPR provides for setting interrupt priory. Eight levels...

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SeekIC No. : 004476057 Detail

REJ09B0311: Features: • Two interrupt control modes Any of two interrupt control modes can be set by means of bits INTM1 and INTM0 in the interrupt control register (INTCR).• Priority can be assign...

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Part Number:
REJ09B0311
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/12/27

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Product Details

Description



Features:

• Two interrupt control modes Any of two interrupt control modes can be set by means of bits INTM1 and INTM0
   in the interrupt control register (INTCR).
• Priority can be assigned by the interrupt priority register (IPR) IPR provides for setting interrupt priory.
   Eight levels can be set for each module for all interrupts except for the interrupt requests listed below.
   The following seven interrupt requests are given priority of 8, therefore they are accepted at all times.
- NMI
-Illegal instructions
-Trace
-Trap instructions
-CPU address error
-DMA address error (occurred in the DTC)
-Sleep instruction
• Independent vector addresses All interrupt sources are assigned independent vector addresses, making
   it unnecessary for the source to be identified in the interrupt handling routine.
• Thirteen external interrupts NMI is the highest-priority interrupt, and is accepted at all times. Rising edge or
   falling edge detection can be selected for NMI. Falling edge, rising edge, or both edge detection, or level
   sensing,  can be selected for IRQ11 to IRQ0.
• DTC control DTC can be activated by means of interrupts.
• CPU priority control function

The priority levels can be assigned to the CPU and DTC. The priority level of the CPU can be automatically assigned on an exception generation. Priority can be given to the CPU interrupt exception handling over that of the DTC transfer.





Application

Examples of the applications of this LSI include PC peripheral equipment, optical storage devices,office automation equipment, and industrial equipment.




Pinout

  Connection Diagram


Specifications

Item
Symbol
Value
Unit
Power supply voltage
Vcc
−0.3 to +4.6
V
Input voltage (except port 5)
Vin
−0.3 to Vcc +0.3
V
Input voltage (port 5)
Vin
−0.3 to AVcc +0.3
V
Reference power supply voltage
Vref
−0.3 to AVcc +0.3
V
Analog power supply voltage
AVCC
−0.3 to +4.6
V
Analog input voltage
VAN
−0.3 to AVcc +0.3
V
Operating temperature
Topr
Regular specifications:−20 to +75
Wide-range specifications:40 to +85
Operating temperature
Tstr
−55 to +125
Caution: Permanent damage to the LSI may result if absolute maximum ratings are exceeded.




Description

This LSI has an on-chip bus controller REJ09B0311 (BSC) that manages the external address space divided into eight areas.

The bus controller REJ09B0311 also has a bus arbitration function, and controls the operation of the internal bus masters; CPU and DTC.






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