Features: High input-voltage device (absolute maximum rating: 18 V)Wide operating voltage range: 2.0 V to 16 VThe delay time for every detection can be set via an external capacitor. Each delay time for Overcharge detection, Overdischarge detection, Overcurrent detection are Proportion of hundred ...
S-8232: Features: High input-voltage device (absolute maximum rating: 18 V)Wide operating voltage range: 2.0 V to 16 VThe delay time for every detection can be set via an external capacitor. Each delay time...
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| Item | Symbol | Applied Pins | Rating | Unit |
| Input voltage between VCC and VSS | VDS | VCC | VSS-0.3 to VCC+18 | V |
| SENS Input terminal voltage | VSENS | SENS | VSS-0.3 to VCC+0.3 | V |
| ICT Input terminal voltage | VICT | ICT | VSS-0.3 to VCC+0.3 | V |
| VM Input terminal voltage | VVM | VM | VCC-18 to VCC+0.3 | V |
| DO output terminal voltage | VDO | DO | VSS-0.3 to VCC+0.3 | V |
| CO output terminal voltage | VCO | CO | VVM-0.3 to VCC+0.3 | V |
| Power dissipation | PD | 300 | mW | |
| Operating temperature range | Topr | -40 to +85 | °C | |
| Storage temperature range | Tstg | -40 to +125 | °C |
This S-8232 IC is provided with the two overcurrent detection levels (VIOV1 and VIOV2) and the two overcurrent detection delay time (tIOV1 and tIOV2) corresponding to each overcurrent detection level.
If the discharging current of S-8232 becomes equal to or higher than a specified value (the VM terminal voltage is equal to or higher than the overcurrent detection voltage) during discharging under normal condition and it continues for the overcurrent detection delay time (tIOV) or longer, the discharging FET turns off to stop discharging. This condition is called an overcurrent condition. The VM and VSS terminals are shorted by the Rvsm resistor at this time. The charging FET turns off.
When the discharging FET is off and a load is connected, the VM terminal voltage equals the VCC potential.
The overcurrent condition of S-8232 returns to the normal condition when the load is released and the impedance between the EB- and EB+ terminals (see Figure 6 for a connection example) is 200MW or higher. When the load is released, the VM terminal, which and the VSS terminal are shorted with the Rvsm resistor, goes back to the VSS potential. The S-8232 IC detects that the VM terminal potential returns to overcurrent detection voltage 1 (VIOV1) or lower and returns to the normal condition.