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S29NS-P

Features: `Single 1.8 V read/program/erase (1.701.95 V)`90 nm MirrorBit Technology`Multiplexed Data and Address for reduced I/O count`Simultaneous Read/Write operation`Full/Half drive output slew rate control`32-word Write Buffer`Sixteen-bank architecture consisting of 64/32/16 MB for NS512/256/12...

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S29NS-P: Features: `Single 1.8 V read/program/erase (1.701.95 V)`90 nm MirrorBit Technology`Multiplexed Data and Address for reduced I/O count`Simultaneous Read/Write operation`Full/Half drive output slew ra...

S29NS-P Data Sheet

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Part Number:
S29NS-P
Supply Ability:
5000

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Product Details

Description



Features:

`Single 1.8 V read/program/erase (1.701.95 V)
`90 nm MirrorBit Technology
`Multiplexed Data and Address for reduced I/O count
`Simultaneous Read/Write operation
`Full/Half drive output slew rate control
`32-word Write Buffer
`Sixteen-bank architecture consisting of 64/32/16 MB for NS512/256/128P, respectively
`Four 32 KB sectors at the top of memory array (NS256/128P)
`512 128KB sectors (NS512P), 255/127 128KB sectors (NS256/ 128P)
`Programmable linear (8/16/32) with or without wrap around and continuous burst read modes
`Secured Silicon Sector region consisting of 128 words each for factory and customer
`20-year data retention (typical)
`Cycling Endurance: 100,000 cycles per sector (typical)
`RDY output indicates data available to system
`Command set compatible with JEDEC (42.4) standard
`Hardware (WP#) protection of highest two sectors
`Top Boot sector configuration (NS256/128P)
`Handshaking by monitoring RDY
`Offered Packages
  NS512P: 64-ball FBGA (8 mm x 9.2 mm)
  NS256P/NS128P: 44-ball FBGA (6.2 mm x 7.7 mm)
`Low VCC write inhibit
`Persistent and Password methods of Advanced Sector Protection
`Write operation status bits indicate program and erase operation completion
`Suspend and Resume commands for Program and Erase operations
`Unlock Bypass program command to reduce programming time
`Synchronous or Asynchronous program operation, independent of burst control register settings
`VPP input pin to reduce factory programming time
`Support for Common Flash Interface (CFI)


Specifications

Storage Temperature Plastic Packages 65°C to +150°C
Ambient Temperature with Power Applied 65°C to +125°C
Voltage with Respect to Ground: All Inputs and I/Os except as noted below (1) 0.5 V to + 2.5 V
VCC (1) 0.5 V to + 2.5 V
VPP (2) 0.5 V to +9.5 V
Output Short Circuit Current (3) 100 mA
Notes
1. Minimum DC voltage on input or I/Os is 0.5 V. During voltage transitions, inputs or I/Os may undershoot VSS to 2.0 V for periods of up to 20 ns. See Figure 10.1. Maximum DC voltage on input or I/Os is VCC + 0.5 V. During voltage transitions outputs may overshoot to VCC + 2.0 V for periods up to 20 ns. See Figure 10.2.
2. Minimum DC input voltage on pin VPP is 0.5V. During voltage transitions, VPP may overshoot VSS to 2.0 V for periods of up to 20 ns. See Figure 10.1. Maximum DC voltage on pin VPP is +9.5 V, which may overshoot to 10.5 V for periods up to 20 ns.
3. No more than one output may be shorted to ground at a time. Duration of the short circuit should not be greater than one second.
4. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational sections of this data sheet is not implied. Exposure of the device to absolute maximum rating conditions for extended periods may affect device reliability.


Description

The Spansion S29NS-P are MirrorBit Flash products fabricated on 90 nm process technology. These burst mode Flash devices are capable of performing simultaneous read and write operations with zero latency on two separate banks using multiplexed data and address pins. These S29NS-P can operate up to 108 MHz and use a single VCC of 1.7 V to 1.95 V that makes them ideal for the demanding wireless applications of today that require higher density, better performance, and lowered power consumption.

 




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