Features: CPU` CalmRISC core (8-bit RISC architecture)Memory` ROM: 8K-word (16K-byte)` RAM: 384-byte (excluding LCD data RAM)Stack` Size: maximum 16 word-level48 I/O Pins` 12 normal I/O pins` 36 I/O pins sharing with LCD signalsBasic Timer` Overflow signal makes a system reset` Watchdog function16...
S3CK225: Features: CPU` CalmRISC core (8-bit RISC architecture)Memory` ROM: 8K-word (16K-byte)` RAM: 384-byte (excluding LCD data RAM)Stack` Size: maximum 16 word-level48 I/O Pins` 12 normal I/O pins` 36 I/O...
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|
Parameter |
Symbol |
Conditions |
Rating |
Unit |
| Supply voltage |
VDD |
- |
0.3 to +6.5 |
V |
| Input voltage |
VI |
- |
0.3 to VDD + 0.3 |
V |
| Output voltage |
VO |
- |
-0.3 to VDD + 0.3 |
V |
| Output current high |
IOH |
One I/O pin active |
-18 |
mA |
|
All I/O pins active |
60 | |||
| Output current low |
IOL |
One I/O pin active |
+ 30 |
mA |
|
Total pin current for port |
+ 100 | |||
| Operating temperature |
TA |
- |
25 to + 85 |
|
| Storage temperature |
TSTG |
- |
65 to + 150 |
The S3CK225/FK225 single-chip CMOS microcontroller is designed for high performance using Samsung's new 8-bit CPU core, CalmRISC.
CalmRISC is an 8-bit low power RISC microcontroller. S3CK225's basic architecture follows Harvard style, that is, S3CK225 has separate program memory and data memory. Both instruction and data can be fetched simultaneously without causing a stall, using separate paths for memory access. Represented below is the top block diagram of the CalmRISC microcontroller.