SA8027

The SA8027 BICMOS device integrates programmable dividers, charge pumps and phase comparators to implement phase-locked loops. The device is designed to operate from 3 NiCd cells, in pocket phones, with low current and nominal 3 V supplies.

The synthesizer operates at VCO input frequencies up to 2.5 GHz. The synthesizer has fully programmable main, auxiliary and reference dividers. All divider ratios are supplied via a 3-wire serial programming bus. The main divider is a fractional-N divider with programmable integer ratios from 512 to 65535.

Separate power and ground pins are provided to the charge pumps and digital circuits. The ground pins should be externally connected to prevent large currents from flowing across the die and causing damage. V_DDCP must be equal to or greater than V_DD.

The charge pump current (gain) is fully programmable, while ISET is set by an external resistance at the R_SET pin (refer to section 1.5, Main Output Charge Pumps and Fractional Compensation Currents). The phase/frequency detector charge pump outputs allow for implementing a passive loop filter.