SAA6712E

1.1 RGB video input

· Digital single (24-bit) or dual (48-bit) channel RGB input
· Data input of sampled RGB data with a pixel frequency of maximum 150 MHz
· Free definable data acquisition offsets and vertical window size in single pixel increments, horizontal window size in double pixel increments
· Programmable pulses for ADC clamping and ADC gain correction
· Detection of presence of sync signals, and of their polarities
· Support for auto-adjustment functions for sample clock frequency, phase, vertical and horizontal sample offset, as well as colour adjustment
· Maximum supported resolution of 1280 × 1024 dots Super Extended Graphics Adapter (SXGA)
· Support for detection of the applied graphics mode (auto-scan).

1.2 Video processing

· Colour correction Look-Up Table (LUT)
· Phase correct up and downscaling of the RGB data
· Fully programmable scaling ratios
· Independent horizontal and vertical scaling engine
· Free definable position of the scaled input picture inside the output picture with programmable border colour.

1.3 On screen display

· Character based internal On Screen Display (OSD)
· Programmable character matrix sizes of either 24 × 24 pixels (42 characters available) or 12 × 16 pixels (128 characters available)
· Programmable width and height of the OSD window, built from maximum 1152 characters
· 8 different colours for foreground and background inclusive transparent colours
· Overlay port for external OSD controller.

1.4 Video output

· Single pixel/clock (24-bit) or double pixel/clock (48-bit) digital RGB output
· Generation of synchronization and validation signals for the Thin Film Transistor (TFT) display
· Frame rate control (temporal dithering) for displaying true colour graphics on high colour displays
· Free programmable timing for displays of several manufacturers.

1.5 Memory interface

· Support of both 1M × 16 SDRAM, 256k × 32 SGRAM or 128k × 32 SGRAM devices
· Maximum memory clock frequency of 125 MHz
· Scalable memory size built of either 2, 3 or 4 SDRAM, or of 1 or 2 SGRAM devices
· Special mode for operation without external memory.

1.6 Miscellaneous

· Internal Phase-Locked Loop (PLL) for memory and panel clock generation from the system clock
· I2C-bus interface with 2 selectable addresses
· Boundary scan test circuit and Joint Test Action Group (JTAG) test controller
· Pin compatible to SAA6721E
· Programming compatible to SAA6721E.

The SAA6712E is a graphics engine, which converts digital RGB data into video signals suitable for TFT displays. SAA6712E supports SXGA input resolution as well as true colour. Independent horizontal and vertical up and downscaling can display the input data arbitrarily on the connected TFT display. Auto-scan capability allows the applied graphics mode to be detected.

Overlay signals of SAA6712E can be generated either by an internal OSD generator or supplied via the overlay port from an external OSD controller.

The SAA6712E must be embedded into a system containing a microcontroller with an I²C-bus serial interface. For auto-scan capabilities a frame buffer built from SGRAM or SDRAM is needed. The size of this frame buffer depends on the maximum resolution and bandwidth SAA6712E needed for the application. For converting the analog RGB stream into a digital data stream one or two ADCs with 3 channels each for R, G and B are needed.